[PATCH] D90842: [VE] fastcc with vector register passing

Simon Moll via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 6 06:19:25 PST 2020


simoll updated this revision to Diff 303428.
simoll retitled this revision from " [VE] fastcc with vector register passing" to "[VE] fastcc with vector register passing".
simoll edited the summary of this revision.
simoll added a comment.

- Rebased.
- NFC.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90842/new/

https://reviews.llvm.org/D90842

Files:
  llvm/lib/Target/VE/VECallingConv.td
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VERegisterInfo.cpp
  llvm/test/CodeGen/VE/Vector/call_fastcc.ll
  llvm/test/CodeGen/VE/Vector/callee_fastcc.ll

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