[PATCH] D90842: [VE] fastcc with vector register passing

Kazushi Marukawa via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 5 13:08:08 PST 2020


kaz7 added a comment.

It is better to make a different NFC patch for modifications on the mechanism to retrieve the calling convention.  And need a regression test from caller side.



================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:43
 
+CCAssignFn *getReturnCC(CallingConv::ID CallConv) {
+  switch (CallConv) {
----------------
These modifications are independent from passing vector registers on registers patch.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D90842/new/

https://reviews.llvm.org/D90842



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