[PATCH] D90850: [VE] LVLGen and vreg-to-vreg copy

[Simon Moll via Phabricator via llvm-commits]

simoll created this revision.
simoll added reviewers: kaz7, k-ishizaka.
simoll added a project: VE.
Herald added subscribers: llvm-commits, hiraditya, mgorny.
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simoll requested review of this revision.

This patch implements two things to have one testable unit:

1. LVLGen inserts 'lvl' instructions to set the VL register.
2. vreg-to-vreg copy uses vector instructions.

The VE backend represents vector instructions with an explicit 'i32'
vector length operand.  In the VE ISA, the vector length is always read
from the VL hardware register.  The LVLGen pass makes sure that the VL
register always holds the right value before each vector instruction.

      

We add tests for the 'fastcc', which passes vector operands in registers.
This triggers the vreg-to-vreg copy path, which requires code to set the
VL register, which in turn is inserted by the LVLGen pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90850

Files:
  llvm/lib/Target/VE/CMakeLists.txt
  llvm/lib/Target/VE/LVLGen.cpp
  llvm/lib/Target/VE/VE.h
  llvm/lib/Target/VE/VEInstrInfo.cpp
  llvm/lib/Target/VE/VETargetMachine.cpp
  llvm/test/CodeGen/VE/Vector/fastcc.ll

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