[PATCH] D90591: [ARM] Introduce t2DoLoopStartTP

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

> And how is this done? Is it a generic codegen change and that's why AMDGPU is problematic?

There are just some changes in phi elimination and and the register allocator to make a terminator that produces a value never spill. I was thinking that this was not something that already existed, so we could invent some semantics for it - only use it very carefully in cases we know are going to be OK. Unfortunately the AMDGPU backend is already using it in a different way, where they have pseudo copy terminators for spills. I have to take a look what we can do there.  It also might just be a bad idea in general to say that these can never spill, but I'd like to try it if we can and I've not seen any problems with all the testing I've ran.

> I'm not sure what you mean, are you talking about adding another optional register operand?

Yep. As you might imagine a lot of tests have changed. But it will make sure that the condition from a VPT block is never wrong, that we don't spill lr around an MVE instruction that would be using it as the predicate.


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  https://reviews.llvm.org/D90591/new/

https://reviews.llvm.org/D90591