[PATCH] D90820: [AArch64][GlobalISel] Add AArch64::G_DUPLANE[X] opcodes for lane duplicates.

[Amara Emerson via Phabricator via llvm-commits]

aemerson created this revision.
aemerson added a reviewer: paquette.
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Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
aemerson requested review of this revision.

These were previously handled by pattern matching shuffles in the selector, but adding a new opcode and making it equivalent to the AArch64duplane SDAG node allows us to select more patterns, like lane indexed FMLAs (patch adding a test for that will be committed later).

The pattern matching code has been simply moved to postlegalize lowering.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90820

Files:
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/lib/Target/AArch64/AArch64InstrGISel.td
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-duplane.mir

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