[PATCH] D90801: [RISCV] Remove shadow register list passed to AllocateReg when allocating FP registers

[Craig Topper via Phabricator via llvm-commits]

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The _F and _D registers are already sub/super registers. When one gets allocated all its aliases are already marked as allocated. We don't need to explicitly shadow it too.

I believe shadow is for calling conventions like 64-bit Windows on X86. Where have rules like this

  CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],              
                                           [XMM0, XMM1, XMM2, XMM3]>>

For that calling convention the argument number determines which register is used regardless of how many scalars or vectors came before it.

Removing this removes a question I had in D90738 <https://reviews.llvm.org/D90738>.


https://reviews.llvm.org/D90801

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp


Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1669,9 +1669,9 @@
   // Allocate to a register if possible, or else a stack slot.
   Register Reg;
   if (ValVT == MVT::f32 && !UseGPRForF32)
-    Reg = State.AllocateReg(ArgFPR32s, ArgFPR64s);
+    Reg = State.AllocateReg(ArgFPR32s);
   else if (ValVT == MVT::f64 && !UseGPRForF64)
-    Reg = State.AllocateReg(ArgFPR64s, ArgFPR32s);
+    Reg = State.AllocateReg(ArgFPR64s);
   else
     Reg = State.AllocateReg(ArgGPRs);
   unsigned StackOffset =


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