[PATCH] D90721: [AMDGPU] Resolve pseudo registers at encoding uses

[Joe Nash via Phabricator via llvm-commits]

Joe_Nash updated this revision to Diff 302867.
Joe_Nash added a comment.

whitespace change for lint and rerun build


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90721/new/

https://reviews.llvm.org/D90721

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
  llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
  llvm/test/CodeGen/AMDGPU/flat-scratch.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D90721.302867.patch
Type: text/x-patch
Size: 20155 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201104/39f227a9/attachment.bin>