[PATCH] D90585: [RISCV] Check all 64-bits of the mask in SelectRORIW.
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 4 06:54:43 PST 2020
luismarques accepted this revision.
luismarques added a comment.
This revision is now accepted and ready to land.
Overall LGTM. See inline comment before committing.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:436
// VC2 == 32 - VC1
// VC3 == maskLeadingOnes<uint32_t>(VC2)
//
----------------
Shouldn't this be updated too?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D90585/new/
https://reviews.llvm.org/D90585
More information about the llvm-commits
mailing list