[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

LiuChen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 4 00:56:52 PST 2020


LiuChen3 updated this revision to Diff 302769.
LiuChen3 added a comment.



1. Address comments;
2. Only support parsing vex/vex2/vex3/evex prefix for MASM


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90441/new/

https://reviews.llvm.org/D90441

Files:
  clang/test/CodeGen/X86/ms-inline-asm-prefix.c
  llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp


Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2847,7 +2847,33 @@
       }
       continue;
     }
-
+    // Parse MASM style pseudo prefixes.
+    // FIXME: This prefix should only be used for MASM, not for intel-syntax.
+    if (isParsingIntelSyntax()) {
+      bool IsPrefix = false;
+      if (Name == "vex") {
+        ForcedVEXEncoding = VEXEncoding_VEX;
+        IsPrefix = true;
+      } else if (Name == "vex2") {
+        ForcedVEXEncoding = VEXEncoding_VEX2;
+        IsPrefix = true;
+      } else if (Name == "vex3") {
+        ForcedVEXEncoding = VEXEncoding_VEX3;
+        IsPrefix = true;
+      } else if (Name == "evex") {
+        ForcedVEXEncoding = VEXEncoding_EVEX;
+        IsPrefix = true;
+      }
+      if (IsPrefix) {
+        NameLoc = Parser.getTok().getLoc();
+        if (getLexer().isNot(AsmToken::Identifier))
+          return Error(Parser.getTok().getLoc(), "Expected identifier");
+        // FIXME: The mnemonic won't match correctly if its not in lower case.
+        Name = Parser.getTok().getString();
+        Parser.Lex();
+        continue;
+      }
+    }
     break;
   }
 
@@ -4153,10 +4179,16 @@
 
   MCInst Inst;
 
-  // If VEX3 encoding is forced, we need to pass the USE_VEX3 flag to the
-  // encoder.
-  if (ForcedVEXEncoding == VEXEncoding_VEX3)
+  // If VEX/EVEX encoding is forced, we need to pass the USE_* flag to the
+  // encoder and printer.
+  if (ForcedVEXEncoding == VEXEncoding_VEX)
+    Prefixes |= X86::IP_USE_VEX;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX2)
+    Prefixes |= X86::IP_USE_VEX2;
+  else if (ForcedVEXEncoding == VEXEncoding_VEX3)
     Prefixes |= X86::IP_USE_VEX3;
+  else if (ForcedVEXEncoding == VEXEncoding_EVEX)
+    Prefixes |= X86::IP_USE_EVEX;
 
   // Set encoded flags for {disp8} and {disp32}.
   if (ForcedDispEncoding == DispEncoding_Disp8)
Index: clang/test/CodeGen/X86/ms-inline-asm-prefix.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/X86/ms-inline-asm-prefix.c
@@ -0,0 +1,20 @@
+// REQUIRES: x86-registered-target
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-windows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o -  | FileCheck %s -check-prefix=INTEL
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-windows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=att -S -o -  | FileCheck %s -check-prefix=ATT
+
+void check_inline_prefix(void) {
+  __asm {
+    // INTEL: {vex}     vcvtps2pd       xmm0, xmm1
+    // INTEL: {vex2}    vcvtps2pd       xmm0, xmm1
+    // INTEL: {vex3}    vcvtps2pd       xmm0, xmm1
+    // INTEL: {evex}    vcvtps2pd       xmm0, xmm1
+    // ATT:   {vex}   vcvtps2pd       %xmm1, %xmm0
+    // ATT:   {vex2}  vcvtps2pd       %xmm1, %xmm0
+    // ATT:   {vex3}  vcvtps2pd       %xmm1, %xmm0
+    // ATT:   {evex}  vcvtps2pd       %xmm1, %xmm0
+    vex vcvtps2pd xmm0, xmm1
+    vex2 vcvtps2pd xmm0, xmm1
+    vex3 vcvtps2pd xmm0, xmm1
+    evex vcvtps2pd xmm0, xmm1
+  }
+}


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