[llvm] f099330 - [NFC][Reassociate] Add tests with `add`-like `or` (w/ no common bits set)

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2020-11-03T22:30:51+03:00
New Revision: f099330094d68d268e366defffccf4c311427e67

URL: https://github.com/llvm/llvm-project/commit/f099330094d68d268e366defffccf4c311427e67
DIFF: https://github.com/llvm/llvm-project/commit/f099330094d68d268e366defffccf4c311427e67.diff

LOG: [NFC][Reassociate] Add tests with `add`-like `or` (w/ no common bits set)

Added: 
    llvm/test/Transforms/Reassociate/add-like-or.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/Reassociate/add-like-or.ll b/llvm/test/Transforms/Reassociate/add-like-or.ll
new file mode 100644
index 000000000000..25f2c0563da9
--- /dev/null
+++ b/llvm/test/Transforms/Reassociate/add-like-or.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -reassociate -S | FileCheck %s
+
+; If we don't know that operands have no common bits set,
+; we can't convert the `or` into an `add`.
+define i32 @test1(i32 %a, i32 %b) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:    [[C:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
+; CHECK-NEXT:    ret i32 [[C]]
+;
+  %c = or i32 %a, %b
+  ret i32 %c
+}
+
+; But if we *do* know  that operands have no common bits set,
+; we *can* convert the `or` into an `add`.
+define i32 @test2(i32 %x) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    [[X_NUMLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), [[RNG0:!range !.*]]
+; CHECK-NEXT:    [[RES:%.*]] = or i32 [[X_NUMLZ]], -32
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %x.numlz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true), !range !0
+  %res = or i32 %x.numlz, -32
+  ret i32 %res
+}
+
+; And that allows reassociation in general.
+define i32 @test3(i32 %x, i32 %bit) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[X_NUMLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), [[RNG0]]
+; CHECK-NEXT:    [[ZERO_MINUS_X_NUMACTIVEBITS:%.*]] = or i32 [[X_NUMLZ]], -32
+; CHECK-NEXT:    [[BIT_PLUS_ONE:%.*]] = add i32 [[BIT:%.*]], 1
+; CHECK-NEXT:    [[RES:%.*]] = add i32 [[BIT_PLUS_ONE]], [[ZERO_MINUS_X_NUMACTIVEBITS]]
+; CHECK-NEXT:    ret i32 [[RES]]
+;
+  %x.numlz = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true), !range !0
+  %zero.minus.x.numactivebits = or i32 %x.numlz, -32
+  %bit.plus.one = add i32 %bit, 1
+  %res = add i32 %bit.plus.one, %zero.minus.x.numactivebits
+  ret i32 %res
+}
+
+declare i32 @llvm.ctlz.i32(i32, i1 immarg) #2
+
+!0 = !{i32 0, i32 33}