[llvm] 45bcbe4 - [NFC][AMDGPU] Minor editorial improvements to AMDGPUUsage.rst
via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 3 08:56:35 PST 2020
Author: Tony
Date: 2020-11-03T16:56:01Z
New Revision: 45bcbe46d75a4a7ca604119e9345fdfae3780960
URL: https://github.com/llvm/llvm-project/commit/45bcbe46d75a4a7ca604119e9345fdfae3780960
DIFF: https://github.com/llvm/llvm-project/commit/45bcbe46d75a4a7ca604119e9345fdfae3780960.diff
LOG: [NFC][AMDGPU] Minor editorial improvements to AMDGPUUsage.rst
Differential Revision: https://reviews.llvm.org/D90661
Added:
Modified:
llvm/docs/AMDGPUUsage.rst
Removed:
################################################################################
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 9d8dc1d3286b..fd3bf9c8b68e 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -4328,7 +4328,7 @@ For GFX6-GFX9:
Scalar memory operations are only used to access memory that is proven to not
change during the execution of the kernel dispatch. This includes constant
-address space and global address space for program scope const variables.
+address space and global address space for program scope ``const`` variables.
Therefore, the kernel machine code does not have to maintain the scalar cache to
ensure it is coherent with the vector caches. The scalar and vector caches are
invalidated between kernel dispatches by CP since constant address space data
@@ -4402,8 +4402,7 @@ in table :ref:`amdgpu-amdhsa-memory-model-code-sequences-gfx6-gfx9-table`.
------------------------------------------------------------------------------------
load atomic unordered *any* *any* *Same as non-atomic*.
store atomic unordered *any* *any* *Same as non-atomic*.
- atomicrmw unordered *any* *any* *Same as monotonic
- atomic*.
+ atomicrmw unordered *any* *any* *Same as monotonic atomic*.
**Monotonic Atomic**
------------------------------------------------------------------------------------
load atomic monotonic - singlethread - global 1. buffer/global/ds/flat_load
@@ -5581,7 +5580,7 @@ For GFX10:
Scalar memory operations are only used to access memory that is proven to not
change during the execution of the kernel dispatch. This includes constant
-address space and global address space for program scope const variables.
+address space and global address space for program scope ``const`` variables.
Therefore, the kernel machine code does not have to maintain the scalar cache to
ensure it is coherent with the vector caches. The scalar and vector caches are
invalidated between kernel dispatches by CP since constant address space data
@@ -5675,8 +5674,7 @@ table :ref:`amdgpu-amdhsa-memory-model-code-sequences-gfx10-table`.
------------------------------------------------------------------------------------
load atomic unordered *any* *any* *Same as non-atomic*.
store atomic unordered *any* *any* *Same as non-atomic*.
- atomicrmw unordered *any* *any* *Same as monotonic
- atomic*.
+ atomicrmw unordered *any* *any* *Same as monotonic atomic*.
**Monotonic Atomic**
------------------------------------------------------------------------------------
load atomic monotonic - singlethread - global 1. buffer/global/flat_load
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