[llvm] 46e91f6 - [RISCV] Remove isel patterns for fshl/fshr with same inputs. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-11-02T23:12:18-08:00
New Revision: 46e91f67019ecbf387175034cc3e9d6cd580ff77

URL: https://github.com/llvm/llvm-project/commit/46e91f67019ecbf387175034cc3e9d6cd580ff77
DIFF: https://github.com/llvm/llvm-project/commit/46e91f67019ecbf387175034cc3e9d6cd580ff77.diff

LOG: [RISCV] Remove isel patterns for fshl/fshr with same inputs. NFC

These were being selected to ROL/ROR, but DAG combine should
canonicalize fshl/fshr with same inputs to rotl/rotr which we
also have patterns for.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoB.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index c85ab7996fcc..aecb429fdd15 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -665,9 +665,7 @@ def : Pat<(xor (srl (xor GPR:$rs1, -1), GPR:$rs2), -1),
 
 let Predicates = [HasStdExtZbbOrZbp] in {
 def : Pat<(rotl GPR:$rs1, GPR:$rs2), (ROL GPR:$rs1, GPR:$rs2)>;
-def : Pat<(fshl GPR:$rs1, GPR:$rs1, GPR:$rs2), (ROL GPR:$rs1, GPR:$rs2)>;
 def : Pat<(rotr GPR:$rs1, GPR:$rs2), (ROR GPR:$rs1, GPR:$rs2)>;
-def : Pat<(fshr GPR:$rs1, GPR:$rs1, GPR:$rs2), (ROR GPR:$rs1, GPR:$rs2)>;
 } // Predicates = [HasStdExtZbbOrZbp]
 
 let Predicates = [HasStdExtZbs, IsRV32] in