[PATCH] D90613: [x86] add AVX2 cost model entries for maxnum of 256-bit vectors

[Pengfei Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86TargetTransformInfo.cpp:2531
     { ISD::USUBSAT,    MVT::v8i32,   6 }, // 2 x 128-bit Op + extract/insert
-    { ISD::FMAXNUM,    MVT::f32,     3 },
+    { ISD::FMAXNUM,    MVT::f32,     3 }, // MAXPS + CMPUNORDPS + BLENDVPS
     { ISD::FMAXNUM,    MVT::v4f32,   3 },
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Nit: the comments should be MAXSS + CMPUNORDSS.
The same below.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90613/new/

https://reviews.llvm.org/D90613