[llvm] b26a275 - [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC
Krzysztof Parzyszek via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 2 12:01:08 PST 2020
Author: Krzysztof Parzyszek
Date: 2020-11-02T14:00:45-06:00
New Revision: b26a2755dc107b2608bc9c6c3f8e952613760b46
URL: https://github.com/llvm/llvm-project/commit/b26a2755dc107b2608bc9c6c3f8e952613760b46
DIFF: https://github.com/llvm/llvm-project/commit/b26a2755dc107b2608bc9c6c3f8e952613760b46.diff
LOG: [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC
It's useful outside of Hexagon TTI, and with how TTI is implemented,
it is not accessible outside of TTI.
Added:
Modified:
llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
llvm/lib/Target/Hexagon/HexagonSubtarget.h
llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
index 60792929be91..fe1582a59c7a 100644
--- a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
@@ -125,6 +125,59 @@ HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
return *this;
}
+bool HexagonSubtarget::isHVXElementType(MVT Ty, bool IncludeBool) const {
+ if (!useHVXOps())
+ return false;
+ if (Ty.isVector())
+ Ty = Ty.getVectorElementType();
+ if (IncludeBool && Ty == MVT::i1)
+ return true;
+ ArrayRef<MVT> ElemTypes = getHVXElementTypes();
+ return llvm::find(ElemTypes, Ty) != ElemTypes.end();
+}
+
+bool HexagonSubtarget::isHVXVectorType(MVT VecTy, bool IncludeBool) const {
+ if (!VecTy.isVector() || !useHVXOps() || VecTy.isScalableVector())
+ return false;
+ MVT ElemTy = VecTy.getVectorElementType();
+ if (!IncludeBool && ElemTy == MVT::i1)
+ return false;
+
+ unsigned HwLen = getVectorLength();
+ unsigned NumElems = VecTy.getVectorNumElements();
+ ArrayRef<MVT> ElemTypes = getHVXElementTypes();
+
+ if (IncludeBool && ElemTy == MVT::i1) {
+ // Boolean HVX vector types are formed from regular HVX vector types
+ // by replacing the element type with i1.
+ for (MVT T : ElemTypes)
+ if (NumElems * T.getSizeInBits() == 8 * HwLen)
+ return true;
+ return false;
+ }
+
+ unsigned VecWidth = VecTy.getSizeInBits();
+ if (VecWidth != 8 * HwLen && VecWidth != 16 * HwLen)
+ return false;
+ return llvm::find(ElemTypes, ElemTy) != ElemTypes.end();
+}
+
+bool HexagonSubtarget::isTypeForHVX(Type *VecTy, bool IncludeBool) const {
+ if (!VecTy->isVectorTy() || isa<ScalableVectorType>(VecTy))
+ return false;
+ // Avoid types like <2 x i32*>.
+ if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
+ return false;
+ EVT Ty = EVT::getEVT(VecTy, /*HandleUnknown*/false);
+ if (!Ty.isSimple() || Ty.getSizeInBits() <= 64)
+ return false;
+ if (isHVXVectorType(Ty.getSimpleVT(), IncludeBool))
+ return true;
+ auto Action =
+ getTargetLowering()->getPreferredVectorAction(Ty.getSimpleVT());
+ return Action == TargetLoweringBase::TypeWidenVector;
+}
+
void HexagonSubtarget::UsrOverflowMutation::apply(ScheduleDAGInstrs *DAG) {
for (SUnit &SU : DAG->SUnits) {
if (!SU.isInstr())
diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.h b/llvm/lib/Target/Hexagon/HexagonSubtarget.h
index 5b71784bac26..7b7fb8d04f47 100644
--- a/llvm/lib/Target/Hexagon/HexagonSubtarget.h
+++ b/llvm/lib/Target/Hexagon/HexagonSubtarget.h
@@ -275,42 +275,9 @@ class HexagonSubtarget : public HexagonGenSubtargetInfo {
return makeArrayRef(Types);
}
- bool isHVXElementType(MVT Ty, bool IncludeBool = false) const {
- if (!useHVXOps())
- return false;
- if (Ty.isVector())
- Ty = Ty.getVectorElementType();
- if (IncludeBool && Ty == MVT::i1)
- return true;
- ArrayRef<MVT> ElemTypes = getHVXElementTypes();
- return llvm::find(ElemTypes, Ty) != ElemTypes.end();
- }
-
- bool isHVXVectorType(MVT VecTy, bool IncludeBool = false) const {
- if (!VecTy.isVector() || !useHVXOps() || VecTy.isScalableVector())
- return false;
- MVT ElemTy = VecTy.getVectorElementType();
- if (!IncludeBool && ElemTy == MVT::i1)
- return false;
-
- unsigned HwLen = getVectorLength();
- unsigned NumElems = VecTy.getVectorNumElements();
- ArrayRef<MVT> ElemTypes = getHVXElementTypes();
-
- if (IncludeBool && ElemTy == MVT::i1) {
- // Boolean HVX vector types are formed from regular HVX vector types
- // by replacing the element type with i1.
- for (MVT T : ElemTypes)
- if (NumElems * T.getSizeInBits() == 8*HwLen)
- return true;
- return false;
- }
-
- unsigned VecWidth = VecTy.getSizeInBits();
- if (VecWidth != 8*HwLen && VecWidth != 16*HwLen)
- return false;
- return llvm::find(ElemTypes, ElemTy) != ElemTypes.end();
- }
+ bool isHVXElementType(MVT Ty, bool IncludeBool = false) const;
+ bool isHVXVectorType(MVT VecTy, bool IncludeBool = false) const;
+ bool isTypeForHVX(Type *VecTy, bool IncludeBool = false) const;
unsigned getTypeAlignment(MVT Ty) const {
if (isHVXVectorType(Ty, true))
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
index 045e59a6d421..3c00b2c17193 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
@@ -47,21 +47,6 @@ bool HexagonTTIImpl::useHVX() const {
return ST.useHVXOps() && HexagonAutoHVX;
}
-bool HexagonTTIImpl::isTypeForHVX(Type *VecTy) const {
- if (!VecTy->isVectorTy() || isa<ScalableVectorType>(VecTy))
- return false;
- // Avoid types like <2 x i32*>.
- if (!cast<VectorType>(VecTy)->getElementType()->isIntegerTy())
- return false;
- EVT VecVT = EVT::getEVT(VecTy);
- if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64)
- return false;
- if (ST.isHVXVectorType(VecVT.getSimpleVT()))
- return true;
- auto Action = TLI.getPreferredVectorAction(VecVT.getSimpleVT());
- return Action == TargetLoweringBase::TypeWidenVector;
-}
-
unsigned HexagonTTIImpl::getTypeNumElements(Type *Ty) const {
if (auto *VTy = dyn_cast<FixedVectorType>(Ty))
return VTy->getNumElements();
@@ -171,7 +156,7 @@ unsigned HexagonTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
if (Src->isVectorTy()) {
VectorType *VecTy = cast<VectorType>(Src);
unsigned VecWidth = VecTy->getPrimitiveSizeInBits().getFixedSize();
- if (useHVX() && isTypeForHVX(VecTy)) {
+ if (useHVX() && ST.isTypeForHVX(VecTy)) {
unsigned RegWidth = getRegisterBitWidth(true);
assert(RegWidth && "Non-zero vector register width expected");
// Cost of HVX loads.
@@ -314,11 +299,11 @@ unsigned HexagonTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
}
bool HexagonTTIImpl::isLegalMaskedStore(Type *DataType, Align /*Alignment*/) {
- return HexagonMaskedVMem && isTypeForHVX(DataType);
+ return HexagonMaskedVMem && ST.isTypeForHVX(DataType);
}
bool HexagonTTIImpl::isLegalMaskedLoad(Type *DataType, Align /*Alignment*/) {
- return HexagonMaskedVMem && isTypeForHVX(DataType);
+ return HexagonMaskedVMem && ST.isTypeForHVX(DataType);
}
/// --- Vector TTI end ---
diff --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
index 5a5a5f785443..835358d3fed0 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
+++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
@@ -43,7 +43,6 @@ class HexagonTTIImpl : public BasicTTIImplBase<HexagonTTIImpl> {
const HexagonTargetLowering *getTLI() const { return &TLI; }
bool useHVX() const;
- bool isTypeForHVX(Type *VecTy) const;
// Returns the number of vector elements of Ty, if Ty is a vector type,
// or 1 if Ty is a scalar type. It is incorrect to call this function
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