[PATCH] D90217: [AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands

[Jay Foad via Phabricator via llvm-commits]

foad requested changes to this revision.
foad added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1592-1594
+  // Saturating signed left shift has no effect beyond scalar size minus 1.
+  if (Imm >= ScalarSizeInBits - 1 && Opcode == TargetOpcode::G_SSHLSAT) {
+    Imm = ScalarSizeInBits - 2;
----------------
This is wrong. With 8-bit ints:
1 sshlsat 6 = 0x40
1 sshlsat 7 = 0x7f
I think this should clamp to ScalarSizeInBits - 1 just like ashr does.


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  https://reviews.llvm.org/D90217/new/

https://reviews.llvm.org/D90217