[PATCH] D90465: [VE] Add +vpu attribute

Simon Moll via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 2 00:41:04 PST 2020


simoll added inline comments.


================
Comment at: llvm/lib/Target/VE/VETargetTransformInfo.h:43
 
-  unsigned getNumberOfRegisters(unsigned ClassID) const { return 64; }
+  unsigned getNumberOfRegisters(unsigned ClassID) const {
+    bool VectorRegs = (ClassID == 1);
----------------
kaz7 wrote:
> Modifications after this line look like duplicated from https://reviews.llvm.org/D90462.  Otherwise, LGTM.
This patch depends on D90462 - you see both diffs in this Diff.
Can we commit D90462 and then rebase this patch onto upstream?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90465/new/

https://reviews.llvm.org/D90465



More information about the llvm-commits mailing list