[llvm] 8b281bf - [AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register.
Caroline Concatto via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 1 23:58:37 PST 2020
Author: Caroline Concatto
Date: 2020-11-02T07:57:05Z
New Revision: 8b281bfaf35d00d42c2993fd5a80d749cc21f45e
URL: https://github.com/llvm/llvm-project/commit/8b281bfaf35d00d42c2993fd5a80d749cc21f45e
DIFF: https://github.com/llvm/llvm-project/commit/8b281bfaf35d00d42c2993fd5a80d749cc21f45e.diff
LOG: [AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register.
Only the aliases 'xzr' and 'sp' exist for the physical register x31.
The reason for wanting to remove the alias 'x31' is because it allows users
to write invalid asm that is not accepted by the GNU assembler.
Is there any objection to removing this alias? Or do we want to keep
this for compatibility with existing code that uses w31/x31?
Differential Revision: https://reviews.llvm.org/D90153
Added:
Modified:
llvm/docs/ReleaseNotes.rst
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/MC/AArch64/basic-a64-diagnostics.s
llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
Removed:
################################################################################
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index a5117493bc4e..af5075eb1be3 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -90,6 +90,15 @@ Changes to the ARM Backend
During this release ...
+Changes to the AArch64 Backend
+------------------------------
+
+During this release ...
+
+* The assembler no longer accepts ``w31`` and ``x31`` as aliases for ``wzr``
+ and ``xzr``, because the architecture manual explicitly states that no
+ registers with those names exist.
+
Changes to the MIPS Target
--------------------------
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index ae95d54b2d90..080a2c5d875e 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -2322,8 +2322,6 @@ unsigned AArch64AsmParser::matchRegisterNameAlias(StringRef Name,
if (auto RegNum = StringSwitch<unsigned>(Name.lower())
.Case("fp", AArch64::FP)
.Case("lr", AArch64::LR)
- .Case("x31", AArch64::XZR)
- .Case("w31", AArch64::WZR)
.Default(0))
return Kind == RegKind::Scalar ? RegNum : 0;
diff --git a/llvm/test/MC/AArch64/basic-a64-diagnostics.s b/llvm/test/MC/AArch64/basic-a64-diagnostics.s
index 9114d30bc3d8..f910fd9ea069 100644
--- a/llvm/test/MC/AArch64/basic-a64-diagnostics.s
+++ b/llvm/test/MC/AArch64/basic-a64-diagnostics.s
@@ -2443,30 +2443,38 @@
//// 32-bit addresses
ldr w0, [w20]
ldrsh x3, [wsp]
+ ldrb w0, [sp, x31]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr w0, [w20]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldrsh x3, [wsp]
// CHECK-ERROR-NEXT: ^
+// CHECK-ERROR-NEXT: error: index must be an integer in range [-256, 255].
+// CHECK-ERROR-NEXT: ldrb w0, [sp, x31]
+// CHECK-ERROR-NETX: ^
//// Store things
strb w0, [wsp]
strh w31, [x23, #1]
str x5, [x22, #12]
str w7, [x12, #16384]
+ strb w0, [sp, x31]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: strb w0, [wsp]
// CHECK-ERROR-NEXT: ^
-// CHECK-ERROR-AARCH64: error: invalid operand for instruction
-// CHECK-ERROR-AARCH64-NEXT: strh w31, [x23, #1]
-// CHECK-ERROR-AARCH64-NEXT: ^
+// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR-NEXT: strh w31, [x23, #1]
+// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: too few operands for instruction
// CHECK-ERROR-AARCH64-NEXT: str x5, [x22, #12]
// CHECK-ERROR-AARCH64-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: str w7, [x12, #16384]
// CHECK-ERROR-NEXT: ^
+// CHECK-ERROR-NEXT: error: index must be an integer in range [-256, 255].
+// CHECK-ERROR-NEXT: strb w0, [sp, x31]
+// CHECK-ERROR-NEXT: ^
//// Bad PRFMs
prfm #-1, [sp]
diff --git a/llvm/test/tools/llvm-mca/AArch64/Exynos/load.s b/llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
index 2e90e5ab6f16..ca02708c5c31 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
@@ -8,10 +8,10 @@ ldur x0, [sp, #8]
ldrb w0, [sp], #1
ldrsh w0, [sp, #2]!
ldr x0, [sp, #8]
-ldrb w0, [sp, x31]
-ldrsh w0, [sp, x31, lsl #1]
-ldr w0, [sp, w31, sxtw]
-ldr x0, [sp, w31, uxtw #3]
+ldrb w0, [sp, xzr]
+ldrsh w0, [sp, xzr, lsl #1]
+ldr w0, [sp, wzr, sxtw]
+ldr x0, [sp, wzr, uxtw #3]
ldnp w0, w1, [sp, #8]
ldp x0, x1, [sp], #16
ldpsw x0, x1, [sp, #8]!
diff --git a/llvm/test/tools/llvm-mca/AArch64/Exynos/store.s b/llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
index 3c7d412995be..7729b05c5b4e 100644
--- a/llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
+++ b/llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
@@ -7,10 +7,10 @@ stur x0, [sp, #8]
strb w0, [sp], #1
strh w0, [sp, #2]!
str x0, [sp, #8]
-strb w0, [sp, x31]
-strh w0, [sp, x31, lsl #1]
-str w0, [sp, w31, sxtw]
-str x0, [sp, w31, uxtw #3]
+strb w0, [sp, xzr]
+strh w0, [sp, xzr, lsl #1]
+str w0, [sp, wzr, sxtw]
+str x0, [sp, wzr, uxtw #3]
stnp w0, w1, [sp, #8]
stp x0, x1, [sp], #16
stp w0, w1, [sp, #8]!
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