[llvm] 2762e67 - [PowerPC] Fix a crash in POWER 9 setb peephole
Qiu Chaofan via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 1 22:30:44 PST 2020
Author: Qiu Chaofan
Date: 2020-11-02T14:29:43+08:00
New Revision: 2762e6734fae97b3dabf617e5ec7f053f79e4e32
URL: https://github.com/llvm/llvm-project/commit/2762e6734fae97b3dabf617e5ec7f053f79e4e32
DIFF: https://github.com/llvm/llvm-project/commit/2762e6734fae97b3dabf617e5ec7f053f79e4e32.diff
LOG: [PowerPC] Fix a crash in POWER 9 setb peephole
Variable InnerIsSel references FalseRes, while FalseRes might be
zext/sext. So InnerIsSel should reference SetOrSelCC, otherwise a crash
will happen.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D90142
Added:
Modified:
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index fa56a018cfff..990b94474be8 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -4233,8 +4233,10 @@ static bool mayUseP9Setb(SDNode *N, const ISD::CondCode &CC, SelectionDAG *DAG,
(FalseRes.getOpcode() != ISD::SELECT_CC || CC != ISD::SETEQ)))
return false;
- bool InnerIsSel = FalseRes.getOpcode() == ISD::SELECT_CC;
- SDValue SetOrSelCC = InnerIsSel ? FalseRes : FalseRes.getOperand(0);
+ SDValue SetOrSelCC = FalseRes.getOpcode() == ISD::SELECT_CC
+ ? FalseRes
+ : FalseRes.getOperand(0);
+ bool InnerIsSel = SetOrSelCC.getOpcode() == ISD::SELECT_CC;
if (SetOrSelCC.getOpcode() != ISD::SETCC &&
SetOrSelCC.getOpcode() != ISD::SELECT_CC)
return false;
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll b/llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
index 4762b10af7dd..6f4b4a41c604 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
@@ -1328,3 +1328,18 @@ define i64 @setbn3(float %a, float %b) {
; CHECK: isel
; CHECK: blr
}
+
+; Verify this case doesn't crash
+define void @setbn4(i128 %0, i32* %sel.out) {
+entry:
+; CHECK-LABEL: setbn4:
+; CHECK-NOT: {{\<setb\>}}
+; CHECK: isel
+; CHECK: blr
+ %c1 = icmp ult i128 %0, 5192296858534827628530496329220096
+ %c2 = icmp ugt i128 %0, 5192296858534827628530496329220096
+ %ext = zext i1 %c2 to i32
+ %sel = select i1 %c1, i32 -1, i32 %ext
+ store i32 %sel, i32* %sel.out, align 4
+ ret void
+}
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