[PATCH] D86418: [AVR] Improve inline rotate/shift expansions

Ayke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Oct 31 16:05:26 PDT 2020


aykevl added a comment.

In D86418#2239289 <https://reviews.llvm.org/D86418#2239289>, @dylanmckay wrote:

> Great patch
>
>> I made this patch to get more familiar with these inline expansions, in the hope that I can also do the other expansions inline (such as 32-bit shifts).
>
> That would be nice!

I have tried several things and thought a lot about this, but I can't come up with a good way to handle this. The only thing I can think of is introduce new pseudo 32-bit and 64-bit shift instructions, but that just seems really ugly.
The problem is that I see no way of converting these bigger than 16 bit integers to 16-bit (or 8-bit) open coded instruction sequences before type legalization. Reading https://llvm.org/docs/CodeGenerator.html, it appears that these larger than 16 bit integers are all converted to builtin calls before any custom lowering can be done.

I suspect the real solution is to switch to GlobalISel, which apparently is much more flexible and should allow inserting a custom pass before type legalization.


Repository:
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  https://reviews.llvm.org/D86418/new/

https://reviews.llvm.org/D86418



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