[PATCH] D89047: [AVR] Optimize logic left/right shift

[Ayke via Phabricator via llvm-commits]

aykevl added a comment.

> The original AVR backend TD is also wrong, that it maps the bswap IR to AVR's swap instruction.
>
> Since the IR bswap is byte level operation, which requires the minimal data type to be at least 16-bit.
>
> But AVR's swap performs on half-byte level.

I agree it looks wrong, but I can't get it to produce invalid code: https://godbolt.org/z/3YTnzx

Also, while this is an improvement I wonder whether there is a more systematic way to do this? This optimizes a very specific code pattern but it doesn't seem easy to extend it to other shifts and rotates, such as `((char)x) << 3` for example. The thing I have in mind works like this:

- 8 bit shifts are all implemented with similar code that uses shifts, `swap`s, and `and`s etc to get the correct shift amount
- 16 bit shifts can be built on top of that, either shifting two bytes individually and ORing the results together, or for larger (>= 8 bit) shifts swap the bytes and use an all-zero or all-ones byte for the other.

Or perhaps there are better ways to do this.

If you play around with godbolt.org (https://godbolt.org/z/foW7qc) you can see that it manages to produce very short code for nearly all shifts, apparently falling back to loops for hard cases. It even changes its strategy to inlining the entire shift (no loop) when using `-O2`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89047/new/

https://reviews.llvm.org/D89047