[PATCH] D90465: [VE] Add +vpu attribute

[Simon Moll via Phabricator via llvm-commits]

simoll created this revision.
simoll added reviewers: k-ishizaka, kaz7.
simoll added a project: VE.
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`+vpu` controls whether VEISelLowering adds any vregs.
This defaults to `-vpu` to have scalar code generation out of the box.
We bring up vector isel under the `+vpu` flag. Once vector isel is stable we switch to `+vpu` and advertise vregs and vops in TTI.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90465

Files:
  llvm/lib/Target/VE/VE.td
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VEISelLowering.h
  llvm/lib/Target/VE/VESubtarget.cpp
  llvm/lib/Target/VE/VESubtarget.h
  llvm/lib/Target/VE/VETargetTransformInfo.h

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