[PATCH] D90441: [X86] Add support for vex, vex2, vex3, and evex for MASM

Eric Astor via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 30 05:57:08 PDT 2020


epastor added inline comments.


================
Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o -  | FileCheck %s -check-prefix CHECK
+
----------------
pengfei wrote:
> pengfei wrote:
> > pengfei wrote:
> > > Maybe need `// REQUIRES: x86-registered-target`
> > You may need add att check too since you modified the att code.
> Should it be avalible only when `-fms-compatibility`
The triple is misspelled; it should be `x86_64-pc-windows-msvc` (the "n" in windows is missing)


================
Comment at: clang/test/CodeGen/X86/ms-inline-asm-prefix.c:1
+// RUN:%clang_cc1 %s -ferror-limit 0 -triple=x86_64-pc-widows-msvc -target-feature +avx512f -target-feature +avx2 -target-feature +avx512vl -fasm-blocks -mllvm -x86-asm-syntax=intel -S -o -  | FileCheck %s -check-prefix CHECK
+
----------------
epastor wrote:
> pengfei wrote:
> > pengfei wrote:
> > > pengfei wrote:
> > > > Maybe need `// REQUIRES: x86-registered-target`
> > > You may need add att check too since you modified the att code.
> > Should it be avalible only when `-fms-compatibility`
> The triple is misspelled; it should be `x86_64-pc-windows-msvc` (the "n" in windows is missing)
A broader question: As written, this applies to anything in Intel syntax. Is this an Intel syntax feature, or a MASM feature?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90441/new/

https://reviews.llvm.org/D90441



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