[PATCH] D90162: [llvm][AArch64] Prevent spurious zero extension.

[Francesco Petrogalli via Phabricator via llvm-commits]

fpetrogalli updated this revision to Diff 301652.
fpetrogalli edited the summary of this revision.
fpetrogalli added a comment.

I have addressed the comment from @samparker about making the check in
`UsesDifferInSignExtension` independent on the order of the uses. The
code now uses `llvm::any_of` on all uses.

The request from Sam produced changes in the `ARM` backend, which
require to introduce an extra combine for AND to make sure no code
size regressions were introduced. The details of the changes are
explained in the summary.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90162/new/

https://reviews.llvm.org/D90162

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/zext-and-signed-compare.ll
  llvm/test/CodeGen/ARM/ParallelDSP/multi-use-loads.ll
  llvm/test/CodeGen/ARM/and-sext-combine.ll
  llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll
  llvm/test/CodeGen/ARM/select-imm.ll

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