[llvm] 24bf8fa - [llvm-exegesis] Do not try to assign random registers twice.

Clement Courbet via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 29 05:27:54 PDT 2020


Author: Clement Courbet
Date: 2020-10-29T13:27:35+01:00
New Revision: 24bf8faabd625c213e6275c7cd77d4883f564489

URL: https://github.com/llvm/llvm-project/commit/24bf8faabd625c213e6275c7cd77d4883f564489
DIFF: https://github.com/llvm/llvm-project/commit/24bf8faabd625c213e6275c7cd77d4883f564489.diff

LOG: [llvm-exegesis] Do not try to assign random registers twice.

Doing a random assignment assigns both tested (forward) and back-to-back
(backward) instructions.

When none of the tested instruction and back-to-back instruction have
implicit aliasing, we're currently trying to do a random register
asignment twice.

Fix this (see PR26418).

Differential Revision: https://reviews.llvm.org/D90380

Added: 
    llvm/test/tools/llvm-exegesis/X86/latency-IN16rr.s

Modified: 
    llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-exegesis/X86/latency-IN16rr.s b/llvm/test/tools/llvm-exegesis/X86/latency-IN16rr.s
new file mode 100644
index 000000000000..fcdaf6a40341
--- /dev/null
+++ b/llvm/test/tools/llvm-exegesis/X86/latency-IN16rr.s
@@ -0,0 +1,12 @@
+# RUN: llvm-exegesis -mode=latency -opcode-name=IN16rr -repetition-mode=duplicate | FileCheck %s
+
+CHECK:      ---
+CHECK-NEXT: mode: latency
+CHECK-NEXT: key:
+CHECK-NEXT:   instructions:
+CHECK-NEXT:     - 'IN16rr'
+CHECK-NEXT:     - {{.*}}
+CHECK-NEXT: config: ''
+CHECK-NEXT: register_initial_values:
+CHECK-DAG: - '[[REG1:[A-Z0-9]+]]=0x0'
+CHECK-LAST: ...

diff  --git a/llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
index a0d227d8c4bc..504e7bdcc5cb 100644
--- a/llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/SerialSnippetGenerator.cpp
@@ -140,7 +140,7 @@ static void appendCodeTemplates(const LLVMState &State,
       InstructionTemplate OtherIT(OtherInstr);
       if (!Forward.hasImplicitAliasing())
         setRandomAliasing(Forward, ThisIT, OtherIT);
-      if (!Back.hasImplicitAliasing())
+      else if (!Back.hasImplicitAliasing())
         setRandomAliasing(Back, OtherIT, ThisIT);
       CodeTemplate CT;
       CT.Execution = ExecutionModeBit;


        


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