[PATCH] D90369: [FastRA] Fix handling of bundled MIs

[Pushpinder Singh via Phabricator via llvm-commits]

pdhaliwal created this revision.
Herald added subscribers: llvm-commits, kerbowa, hiraditya, nhaehnle, jvesely, qcolombet, MatzeB.
Herald added a project: LLVM.
pdhaliwal requested review of this revision.

Fast register allocator skips bundled MIs, as the main assignment
loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator)
This was causing SIInsertWaitcnts to crash which expects all
instructions to have registers assigned.

This patch makes sure to set everything inside bundle to the same
assignments done on BUNDLE header.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D90369

Files:
  llvm/lib/CodeGen/RegAllocFast.cpp
  llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll

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