[PATCH] D90321: [mips] Implement add.ps, mul.ps and sub.ps

[Simon Atanasyan via Phabricator via llvm-commits]

atanasyan accepted this revision.
atanasyan added a comment.
This revision is now accepted and ready to land.

LGTM with a few nits. Thanks.

Do you have commit access?



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Comment at: llvm/test/MC/Mips/mips2/invalid-mips5.s:8
         .set noat
+	add.ps    $f25,$f27,$f13  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         bc1f      $fcc1, 4        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
----------------
Fix indentation.


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Comment at: llvm/test/MC/Mips/mips3/invalid-mips5.s:8
         .set noat
+	add.ps    $f25,$f27,$f13  # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         bc1f      $fcc1, 4        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
----------------
Ditto


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Comment at: llvm/test/MC/Mips/mips4/invalid-mips5.s:8
 	.set noat
+	add.ps    $f25,$f27,$f13      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         luxc1     $f19,$s6($s5)       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
----------------
Ditto


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Comment at: llvm/test/MC/Mips/mips64r2/valid.s:271
         mul.d     $f20,$f20,$f16
+	mul.ps	$f14, $f0, $f16        # CHECK: mul.ps $f14, $f0, $f16 # encoding: [0x46,0xd0,0x03,0x82]
         mul.s     $f30,$f10,$f2
----------------
Ditto


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Comment at: llvm/test/MC/Mips/mips64r6/invalid-mips5.s:8
 	.set noat
+	add.ps    $f25,$f27,$f13      # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
         bgezal    $0, 21100           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
----------------
Ditto


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90321/new/

https://reviews.llvm.org/D90321