[PATCH] D90273: [test] Make bt_order_by_weight in switch.ll more robust

Arthur Eubanks via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 28 11:17:05 PDT 2020


aeubanks updated this revision to Diff 301347.
aeubanks added a comment.

restore large branch weights
update comments


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90273/new/

https://reviews.llvm.org/D90273

Files:
  llvm/test/CodeGen/X86/switch.ll


Index: llvm/test/CodeGen/X86/switch.ll
===================================================================
--- llvm/test/CodeGen/X86/switch.ll
+++ llvm/test/CodeGen/X86/switch.ll
@@ -521,11 +521,10 @@
 return: ret void
 
 ; Cases 1,4,7 have a very large branch weight (which shouldn't overflow), so
-; their bit test should come first. 0,3,6 and 2,5,8,9 both have a weight of 12,
-; but the latter set has more cases, so should be tested for earlier.
-; The bit test on 0,3,6 is unnecessary as all cases cover the rage [0, 9].
-; The range check guarantees that cases other than 1,4,7 and 2,5,8,9 must be
-; in 0,3,6.
+; their bit test should come first. 0,3,6 and 2,5,8,9 both have a weight of 20,
+; but the latter set has more cases, so should be tested for earlier. The bit
+; test on 0,3,6 is unnecessary as all cases cover the range [0, 9]. The range
+; check guarantees that cases other than 1,4,7 and 2,5,8,9 must be in 0,3,6.
 
 ; CHECK-LABEL: bt_order_by_weight
 ; 146 = 2^1 + 2^4 + 2^7
@@ -543,11 +542,11 @@
        ; Default:
        i32 1,
        ; Cases 0,3,6:
-       i32 4, i32 4, i32 4,
+       i32 0, i32 0, i32 20,
        ; Cases 1,4,7:
        i32 4294967295, i32 2, i32 4294967295,
        ; Cases 2,5,8,9:
-       i32 3, i32 3, i32 3, i32 3}
+       i32 0, i32 0, i32 0, i32 20}
 
 define void @order_by_weight_and_fallthrough(i32 %x) {
 entry:


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