[PATCH] D90107: [TableGen] [AMDGPU] Add !sub bang operator for subtraction

[Paul C. Anagnostopoulos via Phabricator via llvm-commits]

Paul-C-Anagnostopoulos marked 2 inline comments as done.
Paul-C-Anagnostopoulos added inline comments.


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Comment at: llvm/lib/TableGen/TGParser.cpp:1259
+            Code != BinOpInit::SRL && Code != BinOpInit::SHL &&
+            Code != BinOpInit::MUL)
           ArgType = Resolved;
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madhur13490 wrote:
> I think the condition can be moved to a separate function before it becomes unmanageable.
There are complex conditions like this all over TableGen.


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  https://reviews.llvm.org/D90107/new/

https://reviews.llvm.org/D90107