[PATCH] D90217: [AMDGPU][GlobalISel] Fold a chain of two shift instructions with constant operands

Mirko Brkusanin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 27 06:08:26 PDT 2020


mbrkusanin added inline comments.


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:1562
+  MachineInstr *Shl2Def = MRI.getUniqueVRegDef(Shl2);
+  if (!Shl2Def || Shl2Def->getOpcode() != Opcode)
+    return false;
----------------
foad wrote:
> I don't think Shl2Def can ever be null here, can it?
I guess if the MIR is valid it should never be null. This match is the very similar to the one above (matchPtrAddImmedChain).


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90217/new/

https://reviews.llvm.org/D90217



More information about the llvm-commits mailing list