[PATCH] D90223: [AMDGPU][GlobalISel] Combine shift + logic + shift with constant operands

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin added a comment.

This patch is basically a global-isel version of combineShiftOfShiftedLogic() from DAGCombiner.



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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll:7-8
+; CHECK:       ; %bb.0: ; %.entry
+; CHECK-NEXT:    s_lshl_b32 s0, s0, 4
+; CHECK-NEXT:    s_and_b32 s0, s0, -16
+; CHECK-NEXT:    ; return to shader part epilog
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This can be simplified to a single instruction:
s_lshl_b32 s0, s0, 4
but that will be a different combine.

Same goes for a few more cases below.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D90223/new/

https://reviews.llvm.org/D90223