[llvm] 6482f32 - [NFC][InstCombine] Add more exhaustive test coverage for `(x >>? X1) << C2` pattern (PR37872)
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 27 04:44:25 PDT 2020
Author: Roman Lebedev
Date: 2020-10-27T14:42:52+03:00
New Revision: 6482f3239af193e00b30c0a8f1459be4f22cb141
URL: https://github.com/llvm/llvm-project/commit/6482f3239af193e00b30c0a8f1459be4f22cb141
DIFF: https://github.com/llvm/llvm-project/commit/6482f3239af193e00b30c0a8f1459be4f22cb141.diff
LOG: [NFC][InstCombine] Add more exhaustive test coverage for `(x >>? X1) << C2` pattern (PR37872)
Added:
Modified:
llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll b/llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
index 484779bd6fa8..339d98f731c5 100644
--- a/llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
+++ b/llvm/test/Transforms/InstCombine/canonicalize-ashr-shl-to-masking.ll
@@ -13,248 +13,505 @@
; Basic positive tests
; ============================================================================ ;
-define i32 @positive_samevar(i32 %x, i32 %y) {
+define i8 @positive_samevar(i8 %x, i8 %y) {
; CHECK-LABEL: @positive_samevar(
-; CHECK-NEXT: [[TMP1:%.*]] = shl i32 -1, [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr i32 %x, %y
- %ret = shl i32 %tmp0, %y
- ret i32 %ret
+ %tmp0 = ashr i8 %x, %y
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_sameconst(i32 %x) {
+define i8 @positive_sameconst(i8 %x) {
; CHECK-LABEL: @positive_sameconst(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], -32
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[TMP1]]
;
- %tmp0 = ashr i32 %x, 5
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerashr(i32 %x) {
+define i8 @positive_biggerashr(i8 %x) {
; CHECK-LABEL: @positive_biggerashr(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[X:%.*]], 10
-; CHECK-NEXT: [[RET:%.*]] = shl nsw i32 [[TMP0]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr i32 %x, 10
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = ashr i8 %x, 6
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl(i32 %x) {
+define i8 @positive_biggershl(i8 %x) {
; CHECK-LABEL: @positive_biggershl(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 5
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP1]], 10
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP1]], 6
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr i32 %x, 5
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
-; EXACT on the first shift
+; shl nuw
; ============================================================================ ;
-define i32 @positive_samevar_ashrexact(i32 %x, i32 %y) {
+define i8 @positive_samevar_shlnuw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, %y
+ %ret = shl nuw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuw(
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnuw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 6
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; shl nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnsw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnsw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, %y
+ %ret = shl nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnsw(
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 6
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; shl nuw nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuwnsw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuwnsw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, %y
+ %ret = shl nuw nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuwnsw(
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnuwnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 6
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuwnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; ashr exact
+; ============================================================================ ;
+
+define i8 @positive_samevar_ashrexact(i8 %x, i8 %y) {
; CHECK-LABEL: @positive_samevar_ashrexact(
-; CHECK-NEXT: ret i32 [[X:%.*]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = ashr exact i32 %x, %y
- %ret = shl i32 %tmp0, %y ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, %y
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_sameconst_ashrexact(i32 %x) {
+define i8 @positive_sameconst_ashrexact(i8 %x) {
; CHECK-LABEL: @positive_sameconst_ashrexact(
-; CHECK-NEXT: ret i32 [[X:%.*]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = ashr exact i32 %x, 5
- %ret = shl i32 %tmp0, 5 ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerashr_ashrexact(i32 %x) {
+define i8 @positive_biggerashr_ashrexact(i8 %x) {
; CHECK-LABEL: @positive_biggerashr_ashrexact(
-; CHECK-NEXT: [[RET:%.*]] = ashr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr exact i32 %x, 10
- %ret = shl i32 %tmp0, 5 ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 6
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl_ashrexact(i32 %x) {
+define i8 @positive_biggershl_ashrexact(i8 %x) {
; CHECK-LABEL: @positive_biggershl_ashrexact(
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; ashr exact, shl nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnsw_ashrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnsw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = ashr exact i8 %x, %y
+ %ret = shl nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnsw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnsw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 6
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnsw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; ashr exact, shl nuw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuw_ashrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = ashr exact i32 %x, 5
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, %y
+ %ret = shl nuw i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_biggershl_ashrexact_shlnuw(i32 %x) {
-; CHECK-LABEL: @positive_biggershl_ashrexact_shlnuw(
-; CHECK-NEXT: [[RET:%.*]] = shl nuw i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+define i8 @positive_sameconst_shlnuw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = ashr exact i32 %x, 5
- %ret = shl nuw i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnuw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnuw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 6
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; ashr exact, shl nuw nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuwnsw_ashrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuwnsw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = ashr exact i8 %x, %y
+ %ret = shl nuw nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuwnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuwnsw_ashrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerashr_shlnuwnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerashr_shlnuwnsw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 6
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuwnsw_ashrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuwnsw_ashrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr exact i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
; Vector
; ============================================================================ ;
-define <2 x i32> @positive_samevar_vec(<2 x i32> %x, <2 x i32> %y) {
+define <2 x i8> @positive_samevar_vec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @positive_samevar_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> <i32 -1, i32 -1>, [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> <i8 -1, i8 -1>, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and <2 x i8> [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = ashr <2 x i32> %x, %y
- %ret = shl <2 x i32> %tmp0, %y
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, %y
+ %ret = shl <2 x i8> %tmp0, %y
+ ret <2 x i8> %ret
}
; ============================================================================ ;
; Constant Vectors
; ============================================================================ ;
-define <2 x i32> @positive_sameconst_vec(<2 x i32> %x) {
+define <2 x i8> @positive_sameconst_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[X:%.*]], <i32 -32, i32 -32>
-; CHECK-NEXT: ret <2 x i32> [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i8> [[X:%.*]], <i8 -8, i8 -8>
+; CHECK-NEXT: ret <2 x i8> [[TMP1]]
;
- %tmp0 = ashr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 5, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 3, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 5, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 3, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef2(
-; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 -32, i32 undef, i32 -32>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 undef, i8 -8>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <2 x i32> @positive_biggerashr_vec(<2 x i32> %x) {
+define <2 x i8> @positive_biggerashr_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerashr_vec(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i32> [[X:%.*]], <i32 10, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl nsw <2 x i32> [[TMP0]], <i32 5, i32 5>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 6, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl nsw <2 x i8> [[TMP0]], <i8 3, i8 3>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = ashr <2 x i32> %x, <i32 10, i32 10>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, <i8 6, i8 6>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_biggerashr_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_biggerashr_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerashr_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 10, i32 undef, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 5, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 6, i8 undef, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 3, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggerashr_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_biggerashr_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerashr_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 10, i32 10, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 6, i8 6, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 10, i32 10, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 6, i8 6, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggerashr_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_biggerashr_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerashr_vec_undef2(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 10, i32 undef, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 6, i8 undef, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <2 x i32> @positive_biggershl_vec(<2 x i32> %x) {
+define <2 x i8> @positive_biggershl_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP1]], <i32 10, i32 10>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP1]], <i8 6, i8 6>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = ashr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 10, i32 10>
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 6, i8 6>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 10, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 6, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 10, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 6, i8 6>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 5, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 undef, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 3, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 undef, i8 6>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef2(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = ashr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 undef, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = ashr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 undef, i8 6>
+ ret <3 x i8> %ret
}
; ============================================================================ ;
@@ -263,97 +520,97 @@ define <3 x i32> @positive_biggershl_vec_undef2(<3 x i32> %x) {
; FIXME: drop 'exact' once it is no longer needed.
-define i32 @positive_sameconst_multiuse(i32 %x) {
+define i8 @positive_sameconst_multiuse(i8 %x) {
; CHECK-LABEL: @positive_sameconst_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: ret i32 [[X]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: ret i8 [[X]]
;
- %tmp0 = ashr exact i32 %x, 5
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 3
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerashr_multiuse(i32 %x) {
+define i8 @positive_biggerashr_multiuse(i8 %x) {
; CHECK-LABEL: @positive_biggerashr_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i32 [[X:%.*]], 10
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = ashr exact i32 [[X]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i8 [[X:%.*]], 6
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = ashr exact i8 [[X]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr exact i32 %x, 10
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 6
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl_multiuse(i32 %x) {
+define i8 @positive_biggershl_multiuse(i8 %x) {
; CHECK-LABEL: @positive_biggershl_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[X]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[X]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr exact i32 %x, 5
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = ashr exact i8 %x, 3
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
; Constant Non-Splat Vectors
; ============================================================================ ;
-define <2 x i32> @positive_biggerashr_vec_nonsplat(<2 x i32> %x) {
+define <2 x i8> @positive_biggerashr_vec_nonsplat(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerashr_vec_nonsplat(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i32> [[X:%.*]], <i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP0]], <i32 5, i32 10>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP0]], <i8 3, i8 6>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = ashr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 10>
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 6>
+ ret <2 x i8> %ret
}
-define <2 x i32> @positive_biggerLashr_vec_nonsplat(<2 x i32> %x) {
+define <2 x i8> @positive_biggerLashr_vec_nonsplat(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerLashr_vec_nonsplat(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i32> [[X:%.*]], <i32 5, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP0]], <i32 5, i32 5>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr <2 x i8> [[X:%.*]], <i8 3, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP0]], <i8 3, i8 3>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = ashr <2 x i32> %x, <i32 5, i32 10>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = ashr <2 x i8> %x, <i8 3, i8 6>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
; ============================================================================ ;
; Negative tests. Should not be folded.
; ============================================================================ ;
-define i32 @negative_twovars(i32 %x, i32 %y, i32 %z) {
+define i8 @negative_twovars(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @negative_twovars(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP0]], [[Z:%.*]]
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP0]], [[Z:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = ashr i32 %x, %y
- %ret = shl i32 %tmp0, %z ; $z, not %y
- ret i32 %ret
+ %tmp0 = ashr i8 %x, %y
+ %ret = shl i8 %tmp0, %z ; $z, not %y
+ ret i8 %ret
}
-declare void @use32(i32)
+declare void @use32(i8)
; One use only.
-define i32 @negative_oneuse(i32 %x, i32 %y) {
+define i8 @negative_oneuse(i8 %x, i8 %y) {
; CHECK-LABEL: @negative_oneuse(
-; CHECK-NEXT: [[TMP0:%.*]] = ashr i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP0]], [[Y]]
-; CHECK-NEXT: ret i32 [[RET]]
-;
- %tmp0 = ashr i32 %x, %y
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, %y
- ret i32 %ret
+; CHECK-NEXT: [[TMP0:%.*]] = ashr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP0]], [[Y]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = ashr i8 %x, %y
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
diff --git a/llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll b/llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
index a1ba4e385255..02831ac8610b 100644
--- a/llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
+++ b/llvm/test/Transforms/InstCombine/canonicalize-lshr-shl-to-masking.ll
@@ -13,248 +13,505 @@
; Basic positive tests
; ============================================================================ ;
-define i32 @positive_samevar(i32 %x, i32 %y) {
+define i8 @positive_samevar(i8 %x, i8 %y) {
; CHECK-LABEL: @positive_samevar(
-; CHECK-NEXT: [[TMP1:%.*]] = shl i32 -1, [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr i32 %x, %y
- %ret = shl i32 %tmp0, %y
- ret i32 %ret
+ %tmp0 = lshr i8 %x, %y
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_sameconst(i32 %x) {
+define i8 @positive_sameconst(i8 %x) {
; CHECK-LABEL: @positive_sameconst(
-; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[X:%.*]], -32
-; CHECK-NEXT: ret i32 [[TMP0]]
+; CHECK-NEXT: [[TMP0:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[TMP0]]
;
- %tmp0 = lshr i32 %x, 5
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerlshr(i32 %x) {
+define i8 @positive_biggerlshr(i8 %x) {
; CHECK-LABEL: @positive_biggerlshr(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[X:%.*]], 10
-; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i32 [[TMP0]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr i32 %x, 10
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = lshr i8 %x, 6
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl(i32 %x) {
+define i8 @positive_biggershl(i8 %x) {
; CHECK-LABEL: @positive_biggershl(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[X:%.*]], 5
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP0]], 10
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr i32 %x, 5
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
-; EXACT on the first shift
+; shl nuw
; ============================================================================ ;
-define i32 @positive_samevar_lshrexact(i32 %x, i32 %y) {
+define i8 @positive_samevar_shlnuw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, %y
+ %ret = shl nuw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuw(
+; CHECK-NEXT: [[TMP0:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[TMP0]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnuw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 6
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; shl nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnsw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnsw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, %y
+ %ret = shl nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[TMP0]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 6
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; shl nuw nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuwnsw(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuwnsw(
+; CHECK-NEXT: [[TMP1:%.*]] = shl i8 -1, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and i8 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, %y
+ %ret = shl nuw nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuwnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = and i8 [[X:%.*]], -8
+; CHECK-NEXT: ret i8 [[TMP0]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnuwnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 6
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 6
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuwnsw(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuwnsw(
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], 3
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[TMP0]], 6
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; lshr exact
+; ============================================================================ ;
+
+define i8 @positive_samevar_lshrexact(i8 %x, i8 %y) {
; CHECK-LABEL: @positive_samevar_lshrexact(
-; CHECK-NEXT: ret i32 [[X:%.*]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = lshr exact i32 %x, %y
- %ret = shl i32 %tmp0, %y ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, %y
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_sameconst_lshrexact(i32 %x) {
+define i8 @positive_sameconst_lshrexact(i8 %x) {
; CHECK-LABEL: @positive_sameconst_lshrexact(
-; CHECK-NEXT: ret i32 [[X:%.*]]
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = lshr exact i32 %x, 5
- %ret = shl i32 %tmp0, 5 ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerlshr_lshrexact(i32 %x) {
+define i8 @positive_biggerlshr_lshrexact(i8 %x) {
; CHECK-LABEL: @positive_biggerlshr_lshrexact(
-; CHECK-NEXT: [[RET:%.*]] = lshr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr exact i32 %x, 10
- %ret = shl i32 %tmp0, 5 ; this one is obviously 'nuw'.
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 6
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl_lshrexact(i32 %x) {
+define i8 @positive_biggershl_lshrexact(i8 %x) {
; CHECK-LABEL: @positive_biggershl_lshrexact(
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; lshr exact, shl nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnsw_lshrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnsw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = lshr exact i8 %x, %y
+ %ret = shl nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnsw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnsw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 6
+ %ret = shl nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnsw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nsw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nsw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; lshr exact, shl nuw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuw_lshrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = lshr exact i32 %x, 5
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, %y
+ %ret = shl nuw i8 %tmp0, %y
+ ret i8 %ret
}
-define i32 @positive_biggershl_lshrexact_shlnuw(i32 %x) {
-; CHECK-LABEL: @positive_biggershl_lshrexact_shlnuw(
-; CHECK-NEXT: [[RET:%.*]] = shl nuw i32 [[X:%.*]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+define i8 @positive_sameconst_shlnuw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
;
- %tmp0 = lshr exact i32 %x, 5
- %ret = shl nuw i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnuw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnuw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 6
+ %ret = shl nuw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nuw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nuw i8 %tmp0, 6
+ ret i8 %ret
+}
+
+; ============================================================================ ;
+; lshr exact, shl nuw nsw
+; ============================================================================ ;
+
+define i8 @positive_samevar_shlnuwnsw_lshrexact(i8 %x, i8 %y) {
+; CHECK-LABEL: @positive_samevar_shlnuwnsw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = lshr exact i8 %x, %y
+ %ret = shl nuw nsw i8 %tmp0, %y
+ ret i8 %ret
+}
+
+define i8 @positive_sameconst_shlnuwnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_sameconst_shlnuwnsw_lshrexact(
+; CHECK-NEXT: ret i8 [[X:%.*]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggerlshr_shlnuwnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggerlshr_shlnuwnsw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 6
+ %ret = shl nuw nsw i8 %tmp0, 3
+ ret i8 %ret
+}
+
+define i8 @positive_biggershl_shlnuwnsw_lshrexact(i8 %x) {
+; CHECK-LABEL: @positive_biggershl_shlnuwnsw_lshrexact(
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i8 [[X:%.*]], 3
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr exact i8 %x, 3
+ %ret = shl nuw nsw i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
; Vector
; ============================================================================ ;
-define <2 x i32> @positive_samevar_vec(<2 x i32> %x, <2 x i32> %y) {
+define <2 x i8> @positive_samevar_vec(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @positive_samevar_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> <i32 -1, i32 -1>, [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> <i8 -1, i8 -1>, [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = and <2 x i8> [[TMP1]], [[X:%.*]]
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = lshr <2 x i32> %x, %y
- %ret = shl <2 x i32> %tmp0, %y
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, %y
+ %ret = shl <2 x i8> %tmp0, %y
+ ret <2 x i8> %ret
}
; ============================================================================ ;
; Constant Vectors
; ============================================================================ ;
-define <2 x i32> @positive_sameconst_vec(<2 x i32> %x) {
+define <2 x i8> @positive_sameconst_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec(
-; CHECK-NEXT: [[TMP0:%.*]] = and <2 x i32> [[X:%.*]], <i32 -32, i32 -32>
-; CHECK-NEXT: ret <2 x i32> [[TMP0]]
+; CHECK-NEXT: [[TMP0:%.*]] = and <2 x i8> [[X:%.*]], <i8 -8, i8 -8>
+; CHECK-NEXT: ret <2 x i8> [[TMP0]]
;
- %tmp0 = lshr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 5, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 3, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 5, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 3, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_sameconst_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_sameconst_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_sameconst_vec_undef2(
-; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 -32, i32 undef, i32 -32>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[RET:%.*]] = and <3 x i8> [[X:%.*]], <i8 -8, i8 undef, i8 -8>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <2 x i32> @positive_biggerlshr_vec(<2 x i32> %x) {
+define <2 x i8> @positive_biggerlshr_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerlshr_vec(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 10, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw <2 x i32> [[TMP0]], <i32 5, i32 5>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 6, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw <2 x i8> [[TMP0]], <i8 3, i8 3>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = lshr <2 x i32> %x, <i32 10, i32 10>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, <i8 6, i8 6>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_biggerlshr_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_biggerlshr_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerlshr_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 10, i32 undef, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 5, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 6, i8 undef, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 3, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggerlshr_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_biggerlshr_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerlshr_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 10, i32 10, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 6, i8 6, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 10, i32 10, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 6, i8 6, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggerlshr_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_biggerlshr_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggerlshr_vec_undef2(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 10, i32 undef, i32 10>
- %ret = shl <3 x i32> %tmp0, <i32 5, i32 undef, i32 5>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 6, i8 undef, i8 6>
+ %ret = shl <3 x i8> %tmp0, <i8 3, i8 undef, i8 3>
+ ret <3 x i8> %ret
}
-define <2 x i32> @positive_biggershl_vec(<2 x i32> %x) {
+define <2 x i8> @positive_biggershl_vec(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP0]], <i32 10, i32 10>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP0]], <i8 6, i8 6>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = lshr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 10, i32 10>
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 6, i8 6>
+ ret <2 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef0(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef0(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef0(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 10, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 6, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 10, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 6, i8 6>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef1(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef1(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef1(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 5, i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 3, i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 5, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 undef, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 3, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 undef, i8 6>
+ ret <3 x i8> %ret
}
-define <3 x i32> @positive_biggershl_vec_undef2(<3 x i32> %x) {
+define <3 x i8> @positive_biggershl_vec_undef2(<3 x i8> %x) {
; CHECK-LABEL: @positive_biggershl_vec_undef2(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i32> [[X:%.*]], <i32 5, i32 undef, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <3 x i32> [[TMP0]], <i32 10, i32 undef, i32 10>
-; CHECK-NEXT: ret <3 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <3 x i8> [[X:%.*]], <i8 3, i8 undef, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <3 x i8> [[TMP0]], <i8 6, i8 undef, i8 6>
+; CHECK-NEXT: ret <3 x i8> [[RET]]
;
- %tmp0 = lshr <3 x i32> %x, <i32 5, i32 undef, i32 5>
- %ret = shl <3 x i32> %tmp0, <i32 10, i32 undef, i32 10>
- ret <3 x i32> %ret
+ %tmp0 = lshr <3 x i8> %x, <i8 3, i8 undef, i8 3>
+ %ret = shl <3 x i8> %tmp0, <i8 6, i8 undef, i8 6>
+ ret <3 x i8> %ret
}
; ============================================================================ ;
@@ -263,97 +520,97 @@ define <3 x i32> @positive_biggershl_vec_undef2(<3 x i32> %x) {
; FIXME: drop 'exact' once it is no longer needed.
-define i32 @positive_sameconst_multiuse(i32 %x) {
+define i8 @positive_sameconst_multiuse(i8 %x) {
; CHECK-LABEL: @positive_sameconst_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: ret i32 [[X]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: ret i8 [[X]]
;
- %tmp0 = lshr exact i32 %x, 5
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 3
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggerlshr_multiuse(i32 %x) {
+define i8 @positive_biggerlshr_multiuse(i8 %x) {
; CHECK-LABEL: @positive_biggerlshr_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i32 [[X:%.*]], 10
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = lshr exact i32 [[X]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i8 [[X:%.*]], 6
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = lshr exact i8 [[X]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr exact i32 %x, 10
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 5
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 6
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 3
+ ret i8 %ret
}
-define i32 @positive_biggershl_multiuse(i32 %x) {
+define i8 @positive_biggershl_multiuse(i8 %x) {
; CHECK-LABEL: @positive_biggershl_multiuse(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i32 [[X:%.*]], 5
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[X]], 5
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr exact i8 [[X:%.*]], 3
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[X]], 3
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr exact i32 %x, 5
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, 10
- ret i32 %ret
+ %tmp0 = lshr exact i8 %x, 3
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, 6
+ ret i8 %ret
}
; ============================================================================ ;
; Constant Non-Splat Vectors
; ============================================================================ ;
-define <2 x i32> @positive_biggerlshr_vec_nonsplat(<2 x i32> %x) {
+define <2 x i8> @positive_biggerlshr_vec_nonsplat(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerlshr_vec_nonsplat(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 5, i32 5>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP0]], <i32 5, i32 10>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 3, i8 3>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP0]], <i8 3, i8 6>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = lshr <2 x i32> %x, <i32 5, i32 5>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 10>
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, <i8 3, i8 3>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 6>
+ ret <2 x i8> %ret
}
-define <2 x i32> @positive_biggerLlshr_vec_nonsplat(<2 x i32> %x) {
+define <2 x i8> @positive_biggerLlshr_vec_nonsplat(<2 x i8> %x) {
; CHECK-LABEL: @positive_biggerLlshr_vec_nonsplat(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i32> [[X:%.*]], <i32 5, i32 10>
-; CHECK-NEXT: [[RET:%.*]] = shl <2 x i32> [[TMP0]], <i32 5, i32 5>
-; CHECK-NEXT: ret <2 x i32> [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr <2 x i8> [[X:%.*]], <i8 3, i8 6>
+; CHECK-NEXT: [[RET:%.*]] = shl <2 x i8> [[TMP0]], <i8 3, i8 3>
+; CHECK-NEXT: ret <2 x i8> [[RET]]
;
- %tmp0 = lshr <2 x i32> %x, <i32 5, i32 10>
- %ret = shl <2 x i32> %tmp0, <i32 5, i32 5>
- ret <2 x i32> %ret
+ %tmp0 = lshr <2 x i8> %x, <i8 3, i8 6>
+ %ret = shl <2 x i8> %tmp0, <i8 3, i8 3>
+ ret <2 x i8> %ret
}
; ============================================================================ ;
; Negative tests. Should not be folded.
; ============================================================================ ;
-define i32 @negative_twovars(i32 %x, i32 %y, i32 %z) {
+define i8 @negative_twovars(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @negative_twovars(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP0]], [[Z:%.*]]
-; CHECK-NEXT: ret i32 [[RET]]
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP0]], [[Z:%.*]]
+; CHECK-NEXT: ret i8 [[RET]]
;
- %tmp0 = lshr i32 %x, %y
- %ret = shl i32 %tmp0, %z ; $z, not %y
- ret i32 %ret
+ %tmp0 = lshr i8 %x, %y
+ %ret = shl i8 %tmp0, %z ; $z, not %y
+ ret i8 %ret
}
-declare void @use32(i32)
+declare void @use32(i8)
; One use only.
-define i32 @negative_oneuse(i32 %x, i32 %y) {
+define i8 @negative_oneuse(i8 %x, i8 %y) {
; CHECK-LABEL: @negative_oneuse(
-; CHECK-NEXT: [[TMP0:%.*]] = lshr i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: call void @use32(i32 [[TMP0]])
-; CHECK-NEXT: [[RET:%.*]] = shl i32 [[TMP0]], [[Y]]
-; CHECK-NEXT: ret i32 [[RET]]
-;
- %tmp0 = lshr i32 %x, %y
- call void @use32(i32 %tmp0)
- %ret = shl i32 %tmp0, %y
- ret i32 %ret
+; CHECK-NEXT: [[TMP0:%.*]] = lshr i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: call void @use32(i8 [[TMP0]])
+; CHECK-NEXT: [[RET:%.*]] = shl i8 [[TMP0]], [[Y]]
+; CHECK-NEXT: ret i8 [[RET]]
+;
+ %tmp0 = lshr i8 %x, %y
+ call void @use32(i8 %tmp0)
+ %ret = shl i8 %tmp0, %y
+ ret i8 %ret
}
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