[PATCH] D85882: [AMDGPU] Update subtarget features for new target ID support

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa updated this revision to Diff 300902.
kerbowa added a comment.
Herald added subscribers: asbirlea, qcolombet.

Update, rebase, and merge with change of default patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85882/new/

https://reviews.llvm.org/D85882

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
  llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
  llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
  llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
  llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
  llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
  llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
  llvm/test/CodeGen/AMDGPU/cluster_stores.ll
  llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
  llvm/test/CodeGen/AMDGPU/ctlz.ll
  llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
  llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
  llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
  llvm/test/CodeGen/AMDGPU/frem.ll
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/AMDGPU/fshr.ll
  llvm/test/CodeGen/AMDGPU/function-returns.ll
  llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
  llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
  llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll
  llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
  llvm/test/CodeGen/AMDGPU/idiv-licm.ll
  llvm/test/CodeGen/AMDGPU/idot2.ll
  llvm/test/CodeGen/AMDGPU/idot4s.ll
  llvm/test/CodeGen/AMDGPU/idot4u.ll
  llvm/test/CodeGen/AMDGPU/idot8s.ll
  llvm/test/CodeGen/AMDGPU/idot8u.ll
  llvm/test/CodeGen/AMDGPU/immv216.ll
  llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
  llvm/test/CodeGen/AMDGPU/indirect-call.ll
  llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
  llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
  llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
  llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
  llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
  llvm/test/CodeGen/AMDGPU/max.i16.ll
  llvm/test/CodeGen/AMDGPU/min.ll
  llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
  llvm/test/CodeGen/AMDGPU/nsa-vmem-hazard.mir
  llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
  llvm/test/CodeGen/AMDGPU/saddo.ll
  llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
  llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
  llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
  llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
  llvm/test/CodeGen/AMDGPU/smrd.ll
  llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
  llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
  llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
  llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
  llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
  llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
  llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
  llvm/test/CodeGen/AMDGPU/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/store-local.96.ll
  llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
  llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
  llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
  llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
  llvm/test/MC/AMDGPU/xnack-mask.s