[llvm] 0383a1a - [SVE][AArch64] Fix TypeSize warning in GEP cost analysis

Joe Ellis via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 26 10:40:57 PDT 2020


Author: Joe Ellis
Date: 2020-10-26T17:40:19Z
New Revision: 0383a1a8c230581aec4f2d9d4bfb5f5ed32d2bf5

URL: https://github.com/llvm/llvm-project/commit/0383a1a8c230581aec4f2d9d4bfb5f5ed32d2bf5
DIFF: https://github.com/llvm/llvm-project/commit/0383a1a8c230581aec4f2d9d4bfb5f5ed32d2bf5.diff

LOG: [SVE][AArch64] Fix TypeSize warning in GEP cost analysis

The warning would fire when calling getGEPCost for analyzing the cost of
a GEP instruction. This would result in the use of the now deprecated
implicit cast of TypeSize to uint64_t through the overloaded operator.

This patch fixes the issue by using getKnownMinSize instead of the
implicit cast. This is possible because the code is already
scalable-vector aware. The semantic behaviour of the code is unchanged
by this patch.

Reviewed By: sdesmalen, fpetrogalli

Differential Revision: https://reviews.llvm.org/D89872

Added: 
    llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll

Modified: 
    llvm/include/llvm/Analysis/TargetTransformInfoImpl.h

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index f12971069e57..d18779ffd7c6 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -811,7 +811,12 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
         uint64_t Field = ConstIdx->getZExtValue();
         BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
       } else {
-        int64_t ElementSize = DL.getTypeAllocSize(GTI.getIndexedType());
+        // If this operand is a scalable type, bail out early.
+        // TODO: handle scalable vectors
+        if (isa<ScalableVectorType>(TargetType))
+          return TTI::TCC_Basic;
+        int64_t ElementSize =
+            DL.getTypeAllocSize(GTI.getIndexedType()).getFixedSize();
         if (ConstIdx) {
           BaseOffset +=
               ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;

diff  --git a/llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll b/llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll
new file mode 100644
index 000000000000..4bc6889e3fdd
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/AArch64/cost-scalable-vector-gep.ll
@@ -0,0 +1,15 @@
+; RUN: opt -cost-model -analyze -mtriple=aarch64--linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s < %t
+
+; This regression test is verifying that a GEP instruction performed on a
+; scalable vector does not produce a 'assumption that TypeSize is not scalable'
+; warning when performing cost analysis.
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning: {{.*}}TypeSize is not scalable
+
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %retval = getelementptr
+define <vscale x 16 x i8>* @gep_scalable_vector(<vscale x 16 x i8>* %ptr) {
+  %retval = getelementptr <vscale x 16 x i8>, <vscale x 16 x i8>* %ptr, i32 2
+  ret <vscale x 16 x i8>* %retval
+}


        


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