[llvm] 83cb423 - [VE] Add vector logical instructions
Kazushi Marukawa via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 26 08:29:41 PDT 2020
Author: Kazushi (Jam) Marukawa
Date: 2020-10-27T00:29:33+09:00
New Revision: 83cb423c6e19f3aad819b89140b1d74203b23180
URL: https://github.com/llvm/llvm-project/commit/83cb423c6e19f3aad819b89140b1d74203b23180
DIFF: https://github.com/llvm/llvm-project/commit/83cb423c6e19f3aad819b89140b1d74203b23180.diff
LOG: [VE] Add vector logical instructions
Add VAND/VOR/VXOE/VEQV/VLDZ/VPCNT/VBRV/VSEQ instrucitons and regression
tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90141
Added:
llvm/test/MC/VE/VAND.s
llvm/test/MC/VE/VBRV.s
llvm/test/MC/VE/VEQV.s
llvm/test/MC/VE/VLDZ.s
llvm/test/MC/VE/VOR.s
llvm/test/MC/VE/VPCNT.s
llvm/test/MC/VE/VSEQ.s
llvm/test/MC/VE/VXOR.s
Modified:
llvm/lib/Target/VE/VEInstrVec.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/VEInstrVec.td b/llvm/lib/Target/VE/VEInstrVec.td
index c23e15e4cb51..c77924b4141e 100644
--- a/llvm/lib/Target/VE/VEInstrVec.td
+++ b/llvm/lib/Target/VE/VEInstrVec.td
@@ -494,6 +494,34 @@ multiclass RVDIVm<string opcStr, bits<8>opc, RegisterClass VRC,
let cs = 1, cy = 0, vz = ? in
defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
}
+// Generic RV multiclass with 2 arguments for logical operations.
+// e.g. VAND, VOR, VXOR, and etc.
+let VE_VLIndex = 3 in
+multiclass RVLm<string opcStr, bits<8>opc, RegisterClass ScaRC,
+ RegisterClass RC, RegisterClass RCM> {
+ let cy = 0, sy = 0, vy = ?, vz = ? in
+ defm vv : RVmm<opcStr, ", $vy, $vz", opc, RC, RCM, (ins RC:$vy, RC:$vz)>;
+ let cs = 1, vz = ? in
+ defm rv : RVmm<opcStr, ", $sy, $vz", opc, RC, RCM, (ins ScaRC:$sy, RC:$vz)>;
+ let cs = 1, cy = 0, vz = ? in
+ defm mv : RVmm<opcStr, ", $sy, $vz", opc, RC, RCM, (ins mimm:$sy, RC:$vz)>;
+}
+// Generic RV multiclass with 1 argument.
+// e.g. VLDZ, VPCNT, and VBRV.
+let VE_VLIndex = 2 in
+multiclass RV1m<string opcStr, bits<8>opc, RegisterClass RC,
+ RegisterClass RCM> {
+ let cy = 0, sy = 0, vz = ? in
+ defm v : RVmm<opcStr, ", $vz", opc, RC, RCM, (ins RC:$vz)>;
+}
+// Generic RV multiclass with no argument.
+// e.g. VSEQ.
+let VE_VLIndex = 1 in
+multiclass RV0m<string opcStr, bits<8>opc, RegisterClass RC,
+ RegisterClass RCM> {
+ let cy = 0, sy = 0 in
+ defm "" : RVmm<opcStr, "", opc, RC, RCM, (ins)>;
+}
// Section 8.10.1 - VADD (Vector Add)
let cx = 0, cx2 = 0 in
@@ -670,3 +698,55 @@ def : MnemonicAlias<"pvmins.lo.zx", "pvmins.lo">;
defm VMAXSL : RVm<"vmaxs.l", 0x9a, V64, I64, VM>;
let cs2 = 1 in
defm VMINSL : RVm<"vmins.l", 0x9a, V64, I64, VM>;
+
+//-----------------------------------------------------------------------------
+// Section 8.11 - Vector Logical Operation Instructions
+//-----------------------------------------------------------------------------
+
+// Section 8.11.1 - VAND (Vector And)
+let cx = 0, cx2 = 0 in defm VAND : RVLm<"vand", 0xc4, I64, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVANDLO : RVLm<"pvand.lo", 0xc4, I32, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVANDUP : RVLm<"pvand.up", 0xc4, F32, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVAND : RVLm<"pvand", 0xc4, I64, V64, VM512>;
+
+// Section 8.11.2 - VOR (Vector Or)
+let cx = 0, cx2 = 0 in defm VOR : RVLm<"vor", 0xc5, I64, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVORLO : RVLm<"pvor.lo", 0xc5, I32, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVORUP : RVLm<"pvor.up", 0xc5, F32, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVOR : RVLm<"pvor", 0xc5, I64, V64, VM512>;
+
+// Section 8.11.3 - VXOR (Vector Exclusive Or)
+let cx = 0, cx2 = 0 in defm VXOR : RVLm<"vxor", 0xc6, I64, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVXORLO : RVLm<"pvxor.lo", 0xc6, I32, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVXORUP : RVLm<"pvxor.up", 0xc6, F32, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVXOR : RVLm<"pvxor", 0xc6, I64, V64, VM512>;
+
+// Section 8.11.4 - VEQV (Vector Equivalence)
+let cx = 0, cx2 = 0 in defm VEQV : RVLm<"veqv", 0xc7, I64, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVEQVLO : RVLm<"pveqv.lo", 0xc7, I32, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVEQVUP : RVLm<"pveqv.up", 0xc7, F32, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVEQV : RVLm<"pveqv", 0xc7, I64, V64, VM512>;
+
+// Section 8.11.5 - VLDZ (Vector Leading Zero Count)
+let cx = 0, cx2 = 0 in defm VLDZ : RV1m<"vldz", 0xe7, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVLDZLO : RV1m<"pvldz.lo", 0xe7, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVLDZUP : RV1m<"pvldz.up", 0xe7, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVLDZ : RV1m<"pvldz", 0xe7, V64, VM512>;
+
+// Section 8.11.6 - VPCNT (Vector Population Count)
+let cx = 0, cx2 = 0 in defm VPCNT : RV1m<"vpcnt", 0xac, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVPCNTLO : RV1m<"pvpcnt.lo", 0xac, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVPCNTUP : RV1m<"pvpcnt.up", 0xac, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVPCNT : RV1m<"pvpcnt", 0xac, V64, VM512>;
+
+// Section 8.11.7 - VBRV (Vector Bit Reverse)
+let cx = 0, cx2 = 0 in defm VBRV : RV1m<"vbrv", 0xf7, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVBRVLO : RV1m<"pvbrv.lo", 0xf7, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVBRVUP : RV1m<"pvbrv.up", 0xf7, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVBRV : RV1m<"pvbrv", 0xf7, V64, VM512>;
+
+// Section 8.11.8 - VSEQ (Vector Sequential Number)
+let cx = 0, cx2 = 0 in defm VSEQ : RV0m<"vseq", 0x99, V64, VM>;
+let cx = 0, cx2 = 1 in defm PVSEQLO : RV0m<"pvseq.lo", 0x99, V64, VM>;
+let cx = 1, cx2 = 0 in defm PVSEQUP : RV0m<"pvseq.up", 0x99, V64, VM>;
+let cx = 1, cx2 = 1 in defm PVSEQ : RV0m<"pvseq", 0x99, V64, VM512>;
diff --git a/llvm/test/MC/VE/VAND.s b/llvm/test/MC/VE/VAND.s
new file mode 100644
index 000000000000..7be6f5cf95c0
--- /dev/null
+++ b/llvm/test/MC/VE/VAND.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vand %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc4]
+vand %v11, %s20, %v22
+
+# CHECK-INST: vand %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc4]
+vand %vix, %vix, %vix
+
+# CHECK-INST: pvand.lo %vix, (22)0, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x56,0x60,0xc4]
+pvand.lo %vix, (22)0, %v22
+
+# CHECK-INST: pvand.lo %v11, (63)1, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xc4]
+pvand.lo %v11, (63)1, %v22, %vm11
+
+# CHECK-INST: pvand.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc4]
+pvand.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvand %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc4]
+pvand %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VBRV.s b/llvm/test/MC/VE/VBRV.s
new file mode 100644
index 000000000000..37de0eff5333
--- /dev/null
+++ b/llvm/test/MC/VE/VBRV.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vbrv %v11, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x00,0xf7]
+vbrv %v11, %v22
+
+# CHECK-INST: vbrv %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0xff,0x00,0x00,0x00,0xf7]
+vbrv %vix, %vix
+
+# CHECK-INST: pvbrv.lo %vix, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x00,0x40,0xf7]
+pvbrv.lo %vix, %v22
+
+# CHECK-INST: pvbrv.lo %v11, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x4b,0xf7]
+pvbrv.lo %v11, %v22, %vm11
+
+# CHECK-INST: pvbrv.up %v11, %vix, %vm11
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0x0b,0x00,0x00,0x8b,0xf7]
+pvbrv.up %v11, %vix, %vm11
+
+# CHECK-INST: pvbrv %v12, %v20, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x14,0x00,0x0c,0x00,0x00,0xcc,0xf7]
+pvbrv %v12, %v20, %vm12
diff --git a/llvm/test/MC/VE/VEQV.s b/llvm/test/MC/VE/VEQV.s
new file mode 100644
index 000000000000..8a5cdd6fb563
--- /dev/null
+++ b/llvm/test/MC/VE/VEQV.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: veqv %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc7]
+veqv %v11, %s20, %v22
+
+# CHECK-INST: veqv %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc7]
+veqv %vix, %vix, %vix
+
+# CHECK-INST: pveqv.lo %vix, (22)1, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc7]
+pveqv.lo %vix, (22)1, %v22
+
+# CHECK-INST: pveqv.lo %v11, (63)0, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x7f,0x6b,0xc7]
+pveqv.lo %v11, (63)0, %v22, %vm11
+
+# CHECK-INST: pveqv.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc7]
+pveqv.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pveqv %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc7]
+pveqv %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VLDZ.s b/llvm/test/MC/VE/VLDZ.s
new file mode 100644
index 000000000000..36f63a246dbd
--- /dev/null
+++ b/llvm/test/MC/VE/VLDZ.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vldz %v11, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x00,0xe7]
+vldz %v11, %v22
+
+# CHECK-INST: vldz %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0xff,0x00,0x00,0x00,0xe7]
+vldz %vix, %vix
+
+# CHECK-INST: pvldz.lo %vix, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x00,0x40,0xe7]
+pvldz.lo %vix, %v22
+
+# CHECK-INST: pvldz.lo %v11, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x4b,0xe7]
+pvldz.lo %v11, %v22, %vm11
+
+# CHECK-INST: pvldz.up %v11, %vix, %vm11
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0x0b,0x00,0x00,0x8b,0xe7]
+pvldz.up %v11, %vix, %vm11
+
+# CHECK-INST: pvldz %v12, %v20, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x14,0x00,0x0c,0x00,0x00,0xcc,0xe7]
+pvldz %v12, %v20, %vm12
diff --git a/llvm/test/MC/VE/VOR.s b/llvm/test/MC/VE/VOR.s
new file mode 100644
index 000000000000..70758378fc4a
--- /dev/null
+++ b/llvm/test/MC/VE/VOR.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vor %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc5]
+vor %v11, %s20, %v22
+
+# CHECK-INST: vor %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc5]
+vor %vix, %vix, %vix
+
+# CHECK-INST: pvor.lo %vix, (22)1, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc5]
+pvor.lo %vix, (22)1, %v22
+
+# CHECK-INST: pvor.lo %v11, (63)0, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x7f,0x6b,0xc5]
+pvor.lo %v11, (63)0, %v22, %vm11
+
+# CHECK-INST: pvor.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc5]
+pvor.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvor %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc5]
+pvor %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VPCNT.s b/llvm/test/MC/VE/VPCNT.s
new file mode 100644
index 000000000000..09db1645e6c2
--- /dev/null
+++ b/llvm/test/MC/VE/VPCNT.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vpcnt %v11, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x00,0xac]
+vpcnt %v11, %v22
+
+# CHECK-INST: vpcnt %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0xff,0x00,0x00,0x00,0xac]
+vpcnt %vix, %vix
+
+# CHECK-INST: pvpcnt.lo %vix, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x00,0x40,0xac]
+pvpcnt.lo %vix, %v22
+
+# CHECK-INST: pvpcnt.lo %v11, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x4b,0xac]
+pvpcnt.lo %v11, %v22, %vm11
+
+# CHECK-INST: pvpcnt.up %v11, %vix, %vm11
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0x0b,0x00,0x00,0x8b,0xac]
+pvpcnt.up %v11, %vix, %vm11
+
+# CHECK-INST: pvpcnt %v12, %v20, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x14,0x00,0x0c,0x00,0x00,0xcc,0xac]
+pvpcnt %v12, %v20, %vm12
diff --git a/llvm/test/MC/VE/VSEQ.s b/llvm/test/MC/VE/VSEQ.s
new file mode 100644
index 000000000000..754316d92ee8
--- /dev/null
+++ b/llvm/test/MC/VE/VSEQ.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vseq %v11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x0b,0x00,0x00,0x00,0x99]
+vseq %v11
+
+# CHECK-INST: vseq %vix
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0xff,0x00,0x00,0x00,0x99]
+vseq %vix
+
+# CHECK-INST: pvseq.lo %vix
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0xff,0x00,0x00,0x40,0x99]
+pvseq.lo %vix
+
+# CHECK-INST: pvseq.lo %v11, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x0b,0x00,0x00,0x4b,0x99]
+pvseq.lo %v11, %vm11
+
+# CHECK-INST: pvseq.up %v11, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x0b,0x00,0x00,0x8b,0x99]
+pvseq.up %v11, %vm11
+
+# CHECK-INST: pvseq %v12, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x00,0x00,0x0c,0x00,0x00,0xcc,0x99]
+pvseq %v12, %vm12
diff --git a/llvm/test/MC/VE/VXOR.s b/llvm/test/MC/VE/VXOR.s
new file mode 100644
index 000000000000..d827aab4d6f1
--- /dev/null
+++ b/llvm/test/MC/VE/VXOR.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vxor %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc6]
+vxor %v11, %s20, %v22
+
+# CHECK-INST: vxor %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc6]
+vxor %vix, %vix, %vix
+
+# CHECK-INST: pvxor.lo %vix, (22)0, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x56,0x60,0xc6]
+pvxor.lo %vix, (22)0, %v22
+
+# CHECK-INST: pvxor.lo %v11, (63)1, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xc6]
+pvxor.lo %v11, (63)1, %v22, %vm11
+
+# CHECK-INST: pvxor.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc6]
+pvxor.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvxor %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc6]
+pvxor %v12, %v20, %v22, %vm12
More information about the llvm-commits
mailing list