[llvm] 0acf700 - [VE] Add integer arithmetic vector instructions
Kazushi Marukawa via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 26 02:30:19 PDT 2020
Author: Kazushi (Jam) Marukawa
Date: 2020-10-26T18:30:11+09:00
New Revision: 0acf7002433052c02487645759540431c3b94829
URL: https://github.com/llvm/llvm-project/commit/0acf7002433052c02487645759540431c3b94829
DIFF: https://github.com/llvm/llvm-project/commit/0acf7002433052c02487645759540431c3b94829.diff
LOG: [VE] Add integer arithmetic vector instructions
Add VADD/VADS/VADX/VSUB/VSBS/VSBX/VMPY/VMPS/VMPX/VMPD/VDIV/VDVS/VDVX
instructions. Also add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89642
Added:
llvm/test/MC/VE/VADD.s
llvm/test/MC/VE/VADS.s
llvm/test/MC/VE/VADX.s
llvm/test/MC/VE/VDIV.s
llvm/test/MC/VE/VDVS.s
llvm/test/MC/VE/VDVX.s
llvm/test/MC/VE/VMPD.s
llvm/test/MC/VE/VMPS.s
llvm/test/MC/VE/VMPX.s
llvm/test/MC/VE/VMPY.s
llvm/test/MC/VE/VSBS.s
llvm/test/MC/VE/VSBX.s
llvm/test/MC/VE/VSUB.s
Modified:
llvm/lib/Target/VE/VEInstrVec.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/VEInstrVec.td b/llvm/lib/Target/VE/VEInstrVec.td
index 8e2db99f9cb3..2346c849fd8e 100644
--- a/llvm/lib/Target/VE/VEInstrVec.td
+++ b/llvm/lib/Target/VE/VEInstrVec.td
@@ -433,3 +433,167 @@ multiclass VMVm<string opcStr, bits<8>opc, RegisterClass RC,
defm iv : VMVmm<opcStr, opc, RC, RCM, (ins uimm7:$sy, RC:$vz)>;
}
defm VMV : VMVm<"vmv", 0x9c, V64, VM>;
+
+//-----------------------------------------------------------------------------
+// Section 8.10 - Vector Fixed-Point Arithmetic Instructions
+//-----------------------------------------------------------------------------
+
+// Multiclass for generic vector calculation
+let vx = ?, hasSideEffects = 0, Uses = [VL] in
+multiclass RVbm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+ dag dag_in, string disEnc = ""> {
+ let DisableEncoding = disEnc in
+ def "" : RV<opc, (outs RC:$vx), dag_in,
+ !strconcat(opcStr, " $vx", argStr)>;
+ let Constraints = "$vx = $base", DisableEncoding = disEnc#"$base",
+ isCodeGenOnly = 1 in
+ def _v : RV<opc, (outs RC:$vx), !con(dag_in, (ins RC:$base)),
+ !strconcat(opcStr, " $vx", argStr)>;
+}
+multiclass RVlm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+ dag dag_in> {
+ defm "" : RVbm<opcStr, argStr, opc, RC, dag_in>;
+ let isCodeGenOnly = 1, VE_VLInUse = 1 in {
+ defm l : RVbm<opcStr, argStr, opc, RC, !con(dag_in, (ins I32:$vl)),
+ "$vl,">;
+ defm L : RVbm<opcStr, argStr, opc, RC, !con(dag_in, (ins VLS:$vl)),
+ "$vl,">;
+ }
+}
+multiclass RVmm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+ RegisterClass RCM, dag dag_in> {
+ defm "" : RVlm<opcStr, argStr, opc, RC, dag_in>;
+ let m = ?, VE_VLWithMask = 1 in
+ defm m : RVlm<opcStr, argStr#", $m", opc, RC, !con(dag_in, (ins RCM:$m))>;
+}
+// Generic RV multiclass with 2 arguments.
+// e.g. VADD, VSUB, VMPY, and etc.
+let VE_VLIndex = 3 in
+multiclass RVm<string opcStr, bits<8>opc, RegisterClass VRC, RegisterClass RC,
+ RegisterClass RCM, Operand SIMM = simm7> {
+ let cy = 0, sy = 0, vy = ?, vz = ? in
+ defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>;
+ let cs = 1, vz = ? in
+ defm rv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins RC:$sy, VRC:$vz)>;
+ let cs = 1, cy = 0, vz = ? in
+ defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
+}
+// Special RV multiclass with 2 arguments using cs2.
+// e.g. VDIV, VDVS, and VDVX.
+let VE_VLIndex = 3 in
+multiclass RVDIVm<string opcStr, bits<8>opc, RegisterClass VRC,
+ RegisterClass RC, RegisterClass RCM, Operand SIMM = simm7> {
+ let cy = 0, sy = 0, vy = ?, vz = ? in
+ defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>;
+ let cs2 = 1, vy = ? in
+ defm vr : RVmm<opcStr, ", $vy, $sy", opc, VRC, RCM, (ins VRC:$vy, RC:$sy)>;
+ let cs2 = 1, cy = 0, vy = ? in
+ defm vi : RVmm<opcStr, ", $vy, $sy", opc, VRC, RCM, (ins VRC:$vy, SIMM:$sy)>;
+ let cs = 1, vz = ? in
+ defm rv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins RC:$sy, VRC:$vz)>;
+ let cs = 1, cy = 0, vz = ? in
+ defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
+}
+
+// Section 8.10.1 - VADD (Vector Add)
+let cx = 0, cx2 = 0 in
+defm VADDUL : RVm<"vaddu.l", 0xc8, V64, I64, VM>;
+let cx = 0, cx2 = 1 in {
+ defm PVADDULO : RVm<"pvaddu.lo", 0xc8, V64, I32, VM>;
+ let isCodeGenOnly = 1 in
+ defm VADDUW : RVm<"vaddu.w", 0xc8, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVADDUUP : RVm<"pvaddu.up", 0xc8, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVADDU : RVm<"pvaddu", 0xc8, V64, I64, VM512>;
+def : MnemonicAlias<"vaddu.w", "pvaddu.lo">;
+
+// Section 8.10.2 - VADS (Vector Add Single)
+let cx = 0, cx2 = 0 in
+defm VADDSWSX : RVm<"vadds.w.sx", 0xca, V64, I32, VM>;
+let cx = 0, cx2 = 1 in {
+ defm PVADDSLO : RVm<"pvadds.lo", 0xca, V64, I32, VM>;
+ let isCodeGenOnly = 1 in
+ defm VADDSWZX : RVm<"vadds.w.zx", 0xca, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVADDSUP : RVm<"pvadds.up", 0xca, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVADDS : RVm<"pvadds", 0xca, V64, I64, VM512>;
+def : MnemonicAlias<"pvadds.lo.sx", "vadds.w.sx">;
+def : MnemonicAlias<"vadds.w.zx", "pvadds.lo">;
+def : MnemonicAlias<"vadds.w", "pvadds.lo">;
+def : MnemonicAlias<"pvadds.lo.zx", "pvadds.lo">;
+
+// Section 8.10.3 - VADX (Vector Add)
+defm VADDSL : RVm<"vadds.l", 0x8b, V64, I64, VM>;
+
+// Section 8.10.4 - VSUB (Vector Subtract)
+let cx = 0, cx2 = 0 in
+defm VSUBUL : RVm<"vsubu.l", 0xd8, V64, I64, VM>;
+let cx = 0, cx2 = 1 in {
+ defm PVSUBULO : RVm<"pvsubu.lo", 0xd8, V64, I32, VM>;
+ let isCodeGenOnly = 1 in
+ defm VSUBUW : RVm<"vsubu.w", 0xd8, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVSUBUUP : RVm<"pvsubu.up", 0xd8, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVSUBU : RVm<"pvsubu", 0xd8, V64, I64, VM512>;
+def : MnemonicAlias<"vsubu.w", "pvsubu.lo">;
+
+// Section 8.10.5 - VSBS (Vector Subtract Single)
+let cx = 0, cx2 = 0 in
+defm VSUBSWSX : RVm<"vsubs.w.sx", 0xda, V64, I32, VM>;
+let cx = 0, cx2 = 1 in {
+ defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
+ let isCodeGenOnly = 1 in
+ defm VSUBSWZX : RVm<"vsubs.w.zx", 0xda, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
+def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
+def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
+def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
+def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
+
+// Section 8.10.6 - VSBX (Vector Subtract)
+defm VSUBSL : RVm<"vsubs.l", 0x9b, V64, I64, VM>;
+
+// Section 8.10.7 - VMPY (Vector Multiply)
+let cx2 = 0 in
+defm VMULUL : RVm<"vmulu.l", 0xc9, V64, I64, VM>;
+let cx2 = 1 in
+defm VMULUW : RVm<"vmulu.w", 0xc9, V64, I32, VM>;
+
+// Section 8.10.8 - VMPS (Vector Multiply Single)
+let cx2 = 0 in
+defm VMULSWSX : RVm<"vmuls.w.sx", 0xcb, V64, I32, VM>;
+let cx2 = 1 in
+defm VMULSWZX : RVm<"vmuls.w.zx", 0xcb, V64, I32, VM>;
+def : MnemonicAlias<"vmuls.w", "vmuls.w.zx">;
+
+// Section 8.10.9 - VMPX (Vector Multiply)
+defm VMULSL : RVm<"vmuls.l", 0xdb, V64, I64, VM>;
+
+// Section 8.10.10 - VMPD (Vector Multiply)
+defm VMULSLW : RVm<"vmuls.l.w", 0xd9, V64, I32, VM>;
+
+// Section 8.10.11 - VDIV (Vector Divide)
+let cx2 = 0 in
+defm VDIVUL : RVDIVm<"vdivu.l", 0xe9, V64, I64, VM>;
+let cx2 = 1 in
+defm VDIVUW : RVDIVm<"vdivu.w", 0xe9, V64, I32, VM>;
+
+// Section 8.10.12 - VDVS (Vector Divide Single)
+let cx2 = 0 in
+defm VDIVSWSX : RVDIVm<"vdivs.w.sx", 0xeb, V64, I32, VM>;
+let cx2 = 1 in
+defm VDIVSWZX : RVDIVm<"vdivs.w.zx", 0xeb, V64, I32, VM>;
+def : MnemonicAlias<"vdivs.w", "vdivs.w.zx">;
+
+// Section 8.10.13 - VDVX (Vector Divide)
+defm VDIVSL : RVDIVm<"vdivs.l", 0xfb, V64, I64, VM>;
diff --git a/llvm/test/MC/VE/VADD.s b/llvm/test/MC/VE/VADD.s
new file mode 100644
index 000000000000..309accca9544
--- /dev/null
+++ b/llvm/test/MC/VE/VADD.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vaddu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc8]
+vaddu.l %v11, %s20, %v22
+
+# CHECK-INST: vaddu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc8]
+vaddu.l %vix, %vix, %vix
+
+# CHECK-INST: pvaddu.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc8]
+vaddu.w %vix, 22, %v22
+
+# CHECK-INST: pvaddu.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xc8]
+pvaddu.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvaddu.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc8]
+pvaddu.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvaddu %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc8]
+pvaddu %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VADS.s b/llvm/test/MC/VE/VADS.s
new file mode 100644
index 000000000000..0a367c404a79
--- /dev/null
+++ b/llvm/test/MC/VE/VADS.s
@@ -0,0 +1,40 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vadds.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xca]
+vadds.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vadds.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xca]
+vadds.w.sx %vix, %vix, %vix
+
+# CHECK-INST: pvadds.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xca]
+vadds.w.zx %vix, 22, %v22
+
+# CHECK-INST: pvadds.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xca]
+vadds.w %vix, 22, %v22
+
+# CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xca]
+pvadds.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: vadds.w.sx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xca]
+pvadds.lo.sx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xca]
+pvadds.lo.zx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvadds.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xca]
+pvadds.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvadds %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xca]
+pvadds %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VADX.s b/llvm/test/MC/VE/VADX.s
new file mode 100644
index 000000000000..6463bbd58a4c
--- /dev/null
+++ b/llvm/test/MC/VE/VADX.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vadds.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0x8b]
+vadds.l %v11, %s20, %v22
+
+# CHECK-INST: vadds.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0x8b]
+vadds.l %vix, %vix, %vix
+
+# CHECK-INST: vadds.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0x8b]
+vadds.l %vix, 22, %v22
+
+# CHECK-INST: vadds.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0x8b]
+vadds.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vadds.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0x8b]
+vadds.l %v11, %v23, %v22, %vm11
diff --git a/llvm/test/MC/VE/VDIV.s b/llvm/test/MC/VE/VDIV.s
new file mode 100644
index 000000000000..6ae2f13ba1cb
--- /dev/null
+++ b/llvm/test/MC/VE/VDIV.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xe9]
+vdivu.l %v11, %s20, %v22
+
+# CHECK-INST: vdivu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xe9]
+vdivu.l %vix, %vix, %vix
+
+# CHECK-INST: vdivu.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xe9]
+vdivu.w %vix, 22, %v22
+
+# CHECK-INST: vdivu.l %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x1b,0xe9]
+vdivu.l %v11, %v22, 63, %vm11
+
+# CHECK-INST: vdivu.l %v11, %vix, %s22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x0b,0x00,0x96,0x1b,0xe9]
+vdivu.l %v11, %vix, %s22, %vm11
diff --git a/llvm/test/MC/VE/VDVS.s b/llvm/test/MC/VE/VDVS.s
new file mode 100644
index 000000000000..7dd99f24cc5a
--- /dev/null
+++ b/llvm/test/MC/VE/VDVS.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivs.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xeb]
+vdivs.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vdivs.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xeb]
+vdivs.w.sx %vix, %vix, %vix
+
+# CHECK-INST: vdivs.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xeb]
+vdivs.w.zx %vix, 22, %v22
+
+# CHECK-INST: vdivs.w.zx %vix, %v22, 22
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0xff,0x00,0x16,0x50,0xeb]
+vdivs.w %vix, %v22, 22
+
+# CHECK-INST: vdivs.w.zx %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x5b,0xeb]
+vdivs.w %v11, %v22, 63, %vm11
diff --git a/llvm/test/MC/VE/VDVX.s b/llvm/test/MC/VE/VDVX.s
new file mode 100644
index 000000000000..c751a1bd21fa
--- /dev/null
+++ b/llvm/test/MC/VE/VDVX.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivs.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xfb]
+vdivs.l %v11, %s20, %v22
+
+# CHECK-INST: vdivs.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xfb]
+vdivs.l %vix, %vix, %vix
+
+# CHECK-INST: vdivs.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xfb]
+vdivs.l %vix, 22, %v22
+
+# CHECK-INST: vdivs.l %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x1b,0xfb]
+vdivs.l %v11, %v22, 63, %vm11
+
+# CHECK-INST: vdivs.l %v11, %v22, %s23, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x97,0x1b,0xfb]
+vdivs.l %v11, %v22, %s23, %vm11
diff --git a/llvm/test/MC/VE/VMPD.s b/llvm/test/MC/VE/VMPD.s
new file mode 100644
index 000000000000..fcfd098477db
--- /dev/null
+++ b/llvm/test/MC/VE/VMPD.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.l.w %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xd9]
+vmuls.l.w %v11, %s20, %v22
+
+# CHECK-INST: vmuls.l.w %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xd9]
+vmuls.l.w %vix, %vix, %vix
+
+# CHECK-INST: vmuls.l.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xd9]
+vmuls.l.w %vix, 22, %v22
+
+# CHECK-INST: vmuls.l.w %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xd9]
+vmuls.l.w %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmuls.l.w %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0xd9]
+vmuls.l.w %v11, %v23, %v22, %vm11
diff --git a/llvm/test/MC/VE/VMPS.s b/llvm/test/MC/VE/VMPS.s
new file mode 100644
index 000000000000..3aee208088c9
--- /dev/null
+++ b/llvm/test/MC/VE/VMPS.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xcb]
+vmuls.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vmuls.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xcb]
+vmuls.w.sx %vix, %vix, %vix
+
+# CHECK-INST: vmuls.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xcb]
+vmuls.w.zx %vix, 22, %v22
+
+# CHECK-INST: vmuls.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xcb]
+vmuls.w %vix, 22, %v22
+
+# CHECK-INST: vmuls.w.zx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xcb]
+vmuls.w %v11, 63, %v22, %vm11
diff --git a/llvm/test/MC/VE/VMPX.s b/llvm/test/MC/VE/VMPX.s
new file mode 100644
index 000000000000..a5c34c2adcf5
--- /dev/null
+++ b/llvm/test/MC/VE/VMPX.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xdb]
+vmuls.l %v11, %s20, %v22
+
+# CHECK-INST: vmuls.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xdb]
+vmuls.l %vix, %vix, %vix
+
+# CHECK-INST: vmuls.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xdb]
+vmuls.l %vix, 22, %v22
+
+# CHECK-INST: vmuls.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xdb]
+vmuls.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmuls.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0xdb]
+vmuls.l %v11, %v23, %v22, %vm11
diff --git a/llvm/test/MC/VE/VMPY.s b/llvm/test/MC/VE/VMPY.s
new file mode 100644
index 000000000000..fa323f0870cf
--- /dev/null
+++ b/llvm/test/MC/VE/VMPY.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmulu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc9]
+vmulu.l %v11, %s20, %v22
+
+# CHECK-INST: vmulu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc9]
+vmulu.l %vix, %vix, %vix
+
+# CHECK-INST: vmulu.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc9]
+vmulu.w %vix, 22, %v22
+
+# CHECK-INST: vmulu.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xc9]
+vmulu.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmulu.l %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x0b,0xc9]
+vmulu.l %v11, %vix, %v22, %vm11
diff --git a/llvm/test/MC/VE/VSBS.s b/llvm/test/MC/VE/VSBS.s
new file mode 100644
index 000000000000..a1fceeff1e3b
--- /dev/null
+++ b/llvm/test/MC/VE/VSBS.s
@@ -0,0 +1,40 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubs.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xda]
+vsubs.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vsubs.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xda]
+vsubs.w.sx %vix, %vix, %vix
+
+# CHECK-INST: pvsubs.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xda]
+vsubs.w.zx %vix, 22, %v22
+
+# CHECK-INST: pvsubs.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xda]
+vsubs.w %vix, 22, %v22
+
+# CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xda]
+pvsubs.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: vsubs.w.sx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xda]
+pvsubs.lo.sx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xda]
+pvsubs.lo.zx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xda]
+pvsubs.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xda]
+pvsubs %v12, %v20, %v22, %vm12
diff --git a/llvm/test/MC/VE/VSBX.s b/llvm/test/MC/VE/VSBX.s
new file mode 100644
index 000000000000..f915ffaff796
--- /dev/null
+++ b/llvm/test/MC/VE/VSBX.s
@@ -0,0 +1,24 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubs.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0x9b]
+vsubs.l %v11, %s20, %v22
+
+# CHECK-INST: vsubs.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0x9b]
+vsubs.l %vix, %vix, %vix
+
+# CHECK-INST: vsubs.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0x9b]
+vsubs.l %vix, 22, %v22
+
+# CHECK-INST: vsubs.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0x9b]
+vsubs.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vsubs.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0x9b]
+vsubs.l %v11, %v23, %v22, %vm11
diff --git a/llvm/test/MC/VE/VSUB.s b/llvm/test/MC/VE/VSUB.s
new file mode 100644
index 000000000000..be57d53047ff
--- /dev/null
+++ b/llvm/test/MC/VE/VSUB.s
@@ -0,0 +1,28 @@
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xd8]
+vsubu.l %v11, %s20, %v22
+
+# CHECK-INST: vsubu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xd8]
+vsubu.l %vix, %vix, %vix
+
+# CHECK-INST: pvsubu.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xd8]
+vsubu.w %vix, 22, %v22
+
+# CHECK-INST: pvsubu.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xd8]
+pvsubu.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubu.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xd8]
+pvsubu.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvsubu %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xd8]
+pvsubu %v12, %v20, %v22, %vm12
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