[PATCH] D90045: [ARM][SchedModels] Convert IsLdrAm3NegRegOffPred to MCSchedPredicate

[Eugene Leviant via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGd613e39d52d2: [ARM][SchedModels] Convert IsLdrAm3NegRegOffPred to MCSchedPredicate (authored by evgeny777).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90045/new/

https://reviews.llvm.org/D90045

Files:
  llvm/include/llvm/Target/TargetInstrPredicate.td
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMSchedule.td
  llvm/lib/Target/ARM/ARMScheduleA57.td
  llvm/test/tools/llvm-mca/ARM/cortex-a57-memory-instructions.s

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