[PATCH] D89788: [RISCV] Add GHC calling convention

[Jessica Clarke via Phabricator via llvm-commits]

jrtc27 added a comment.

What happens if you try and use a soft-float or single-float ABI with ghccc? Will GHC know to use integer registers instead, or will this cause errors that mean we need to validate the ABI+CC combination?



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Comment at: llvm/test/CodeGen/RISCV/ghc-cc-rv32.ll:1
+; RUN: llc -mtriple=riscv32 -mattr=+f,+d --target-abi ilp32d < %s \
+; RUN:   | FileCheck %s
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jrtc27 wrote:
> Please use update_llc_test_checks.py for these.
Please use "ghccc" rather than "ghc-cc" in the names of these files to match the calling convention name (as is done with the fastcc tests).


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Comment at: llvm/test/CodeGen/RISCV/ghc-cc-rv32.ll:1-2
+; RUN: llc -mtriple=riscv32 -mattr=+f,+d --target-abi ilp32d < %s \
+; RUN:   | FileCheck %s
+
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Please use update_llc_test_checks.py for these.


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  https://reviews.llvm.org/D89788/new/

https://reviews.llvm.org/D89788