[PATCH] D80364: [amdgpu] Teach load widening to handle non-DWORD aligned loads.
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 23 10:42:37 PDT 2020
rampitec added a comment.
LGTM in principle. We wanted to split CodeGenPrepare for a long time already. We also should drop widening from an early pass then.
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Comment at: llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp:118
+ return false;
+ auto Ty = LI.getType();
+ // Skip aggregate types.
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Please use "auto *" as tidy suggests.
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Comment at: llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp:146
+ int64_t Offset = 0;
+ auto Base =
+ GetPointerBaseWithConstantOffset(LI.getPointerOperand(), Offset, *DL);
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Also "auto *".
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp:166
+ unsigned LdBits = DL->getTypeStoreSize(LI.getType()) * 8;
+ auto IntNTy = Type::getIntNTy(LI.getContext(), LdBits);
+
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Same here and in another places.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D80364/new/
https://reviews.llvm.org/D80364
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