[llvm] 13edfcc - [DebugInfo] Clear subreg in setDebugValueUndef()

[David Stenberg via llvm-commits]

Author: David Stenberg
Date: 2020-10-23T08:49:14+02:00
New Revision: 13edfcc97d29574d1d38ded4fa9c2af6e6519472

URL: https://github.com/llvm/llvm-project/commit/13edfcc97d29574d1d38ded4fa9c2af6e6519472
DIFF: https://github.com/llvm/llvm-project/commit/13edfcc97d29574d1d38ded4fa9c2af6e6519472.diff

LOG: [DebugInfo] Clear subreg in setDebugValueUndef()

When switching the register debug operands to $noreg in
setupDebugValueUndef() also clear the sub-register indices for virtual
registers. This is done when marking DBG_VALUEs undef in other cases,
e.g. in LiveDebugVariables. I have not found any cases where leaving the
sub-register index causes any issues, and the indices would eventually
get dropped when LiveDebugVariables reinserted the undef DBG_VALUEs
after register scheduling, but if nothing else it looked a bit weird in
printouts to have sub-register indices on $noreg, and I don't think the
sub-register index holds any meaningful information at that point.

I have not been able to find any source-level reproducer for this with
an upstream target, so I have just added an instrumented machine-sink
test.

Reviewed By: djtodoro, jmorse

Differential Revision: https://reviews.llvm.org/D89941

Added: 
    llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir

Modified: 
    llvm/include/llvm/CodeGen/MachineInstr.h

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/MachineInstr.h b/llvm/include/llvm/CodeGen/MachineInstr.h
index 582f82646d7f..842abc698b8f 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -1784,8 +1784,10 @@ class MachineInstr
   void setDebugValueUndef() {
     assert(isDebugValue() && "Must be a debug value instruction.");
     for (MachineOperand &MO : debug_operands()) {
-      if (MO.isReg())
+      if (MO.isReg()) {
         MO.setReg(0);
+        MO.setSubReg(0);
+      }
     }
   }
 

diff  --git a/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir b/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
new file mode 100644
index 000000000000..9d60c1ab2e6e
--- /dev/null
+++ b/llvm/test/DebugInfo/MIR/X86/machinesink-subreg.mir
@@ -0,0 +1,89 @@
+# RUN: llc -mtriple=x86_64-unknown-unknown -run-pass=machine-sink -o - %s | FileCheck %s
+
+# Based on machinesink.mir. Verify that the sub-register index in the DBG_VALUE
+# instruction is cleared when marking the debug value undef.
+
+--- |
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  target triple = "x86_64-unknown-linux-gnu"
+
+  @x = common local_unnamed_addr global i32 0, align 4
+
+  define void @test(i32* nocapture readonly %p) local_unnamed_addr !dbg !14 {
+  ; Stripped
+  entry:
+    br label %block1
+  block1:
+    br label %exit
+  exit:
+    ret void
+  }
+
+  !llvm.dbg.cu = !{!1}
+  !llvm.module.flags = !{!5, !6}
+  !llvm.ident = !{!7}
+
+  !1 = distinct !DICompileUnit(language: DW_LANG_C99, file: !2, producer: "clang", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !3, globals: !3)
+  !2 = !DIFile(filename: "t.c", directory: "")
+  !3 = !{}
+  !4 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !5 = !{i32 2, !"Dwarf Version", i32 4}
+  !6 = !{i32 2, !"Debug Info Version", i32 3}
+  !7 = !{!"clang version 4.0.0 "}
+  !8 = !DISubroutineType(types: !9)
+  !9 = !{null, !10}
+  !10 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64)
+  !11 = !DIDerivedType(tag: DW_TAG_const_type, baseType: !12)
+  !12 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
+  !13 = !DIExpression()
+  !14 = distinct !DISubprogram(name: "test", scope: !2, file: !2, line: 2, type: !8, isLocal: false, isDefinition: true, scopeLine: 3, flags: DIFlagPrototyped, isOptimized: true, unit: !1, retainedNodes: !15)
+  !15 = !{!16}
+  !16 = !DILocalVariable(name: "var", scope: !14, file: !2, line: 2, type: !12)
+  !17 = !DILocation(line: 1, column: 1, scope: !14)
+
+  ; CHECK: [[VAR:![0-9]+]] = !DILocalVariable(name: "var",
+
+...
+---
+name:            test
+tracksRegLiveness: true
+liveins:
+  - { reg: '$rdi', virtual-reg: '%2' }
+  - { reg: '$rsi', virtual-reg: '%2' }
+body:             |
+  bb.0.entry:
+    successors: %bb.1.block1, %bb.2.exit
+    liveins: $rdi, $esi
+
+    ; This block should _not_ have the first DBG_VALUE sunk out from it, as it
+    ; would pass a later DBG_VALUE of the same variable location. An undef
+    ; DBG_VALUE should be left behind though. Verify that the sub-register
+    ; index in the DBG_VALUE is cleared.
+    ; CHECK-LABEL: bb.0.entry:
+    ; CHECK:       [[TEST2VREG:%[0-9]+]]:gr64 = COPY $rdi
+    ; CHECK-NEXT:  CMP32ri $esi, 0
+    ; CHECK-NEXT:  DBG_VALUE $noreg, $noreg, [[VAR]]
+    ; CHECK-NEXT:  CMP32ri $esi, 0
+    ; CHECK-NEXT:  DBG_VALUE 0, $noreg, [[VAR]]
+    ; CHECK-NEXT:  JCC_1 %bb.1, 4
+    ; CHECK-NEXT:  JMP_1
+
+    %2:gr64 = COPY $rdi
+    %5:gr64 = ADD64ri8 %2, 1, implicit-def dead $eflags
+    CMP32ri $esi, 0, implicit-def $eflags
+    DBG_VALUE %5.sub_32bit, $noreg, !16, !13, debug-location !17
+    CMP32ri $esi, 0, implicit-def $eflags
+    DBG_VALUE 0, $noreg, !16, !13, debug-location !17
+    JCC_1 %bb.1.block1, 4, implicit $eflags
+    JMP_1 %bb.2.exit
+
+  bb.1.block1:
+    successors: %bb.2.exit
+
+    %1:gr64 = ADD64ri8 %5, 4, implicit-def dead $eflags
+    JMP_1 %bb.2.exit
+
+  bb.2.exit:
+    $rax = MOV64rr %2
+    RET 0
+...