[PATCH] D90009: [X86] VEX/EVEX prefix doesn't work for inline assembly.

[Pengfei Wang via Phabricator via llvm-commits]

pengfei added inline comments.


================
Comment at: clang/test/CodeGen/X86/att-inline-asm-prefix.c:12
+// CHECK: {evex} vcvtps2pd %xmm0, %xmm1
+    "{vex} vcvtps2pd %xmm0, %xmm1\n\t"
+    "{vex2} vcvtps2pd %xmm0, %xmm1\n\t"
----------------
Better adding a no prefix one.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:57-70
     IP_NO_PREFIX = 0,
-    IP_HAS_OP_SIZE = 1,
-    IP_HAS_AD_SIZE = 2,
-    IP_HAS_REPEAT_NE = 4,
-    IP_HAS_REPEAT = 8,
-    IP_HAS_LOCK = 16,
-    IP_HAS_NOTRACK = 32,
-    IP_USE_VEX3 = 64,
-    IP_USE_DISP8 = 128,
-    IP_USE_DISP32 = 256,
+    IP_HAS_OP_SIZE = 1U << 0,
+    IP_HAS_AD_SIZE = 1U << 1,
+    IP_HAS_REPEAT_NE = 1U << 2,
+    IP_HAS_REPEAT = 1U << 3,
+    IP_HAS_LOCK = 1U << 4,
+    IP_HAS_NOTRACK = 1U << 5,
----------------
Can we make these `= 1U <<` aligned?


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:352
+  if (Flags & X86::Force_VEXEncoding)
+    O << "\t{vex}";
+  else if (Flags & X86::Force_VEX2Encoding)
----------------
`"\t{vex}\t"` ?


Repository:
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https://reviews.llvm.org/D90009