[llvm] 549f326 - AMDGPU: Cleanup MIR test
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 22 09:54:52 PDT 2020
Author: Matt Arsenault
Date: 2020-10-22T12:54:35-04:00
New Revision: 549f326d325486d7678f4ca57e6bab2f94fb2f32
URL: https://github.com/llvm/llvm-project/commit/549f326d325486d7678f4ca57e6bab2f94fb2f32
DIFF: https://github.com/llvm/llvm-project/commit/549f326d325486d7678f4ca57e6bab2f94fb2f32.diff
LOG: AMDGPU: Cleanup MIR test
Remove registers section and compact block/register numbers
Added:
Modified:
llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AMDGPU/spill-before-exec.mir b/llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
index 86f2de31e7f9..a63813caff0e 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
@@ -11,103 +11,76 @@ tracksRegLiveness: true
machineFunctionInfo:
scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
stackPtrOffsetReg: $sgpr32
-registers:
- - { id: 0, class: sreg_64 }
- - { id: 1100, class: sgpr_128 }
- - { id: 1101, class: sgpr_128 }
- - { id: 1102, class: sgpr_128 }
- - { id: 1103, class: sgpr_128 }
- - { id: 1104, class: sgpr_128 }
- - { id: 1105, class: sgpr_128 }
- - { id: 1106, class: sgpr_128 }
- - { id: 1107, class: sgpr_128 }
- - { id: 1108, class: sgpr_128 }
- - { id: 1109, class: sgpr_128 }
- - { id: 1110, class: sgpr_128 }
- - { id: 1111, class: sgpr_128 }
- - { id: 1112, class: sgpr_128 }
- - { id: 1113, class: sgpr_128 }
- - { id: 1114, class: sgpr_128 }
- - { id: 1115, class: sgpr_128 }
- - { id: 1116, class: sgpr_128 }
- - { id: 1117, class: sgpr_128 }
- - { id: 1118, class: sgpr_128 }
- - { id: 1119, class: sgpr_128 }
- - { id: 1120, class: sgpr_128 }
- - { id: 1121, class: sgpr_128 }
- - { id: 1122, class: sgpr_128 }
- - { id: 1123, class: sgpr_128 }
- - { id: 1124, class: sgpr_128 }
- - { id: 1125, class: sgpr_128 }
body: |
bb.0:
- successors: %bb.1
liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr100_sgpr101, $sgpr102_sgpr103
+
%0:sreg_64 = COPY $sgpr102_sgpr103
- %1100 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
- %1101 = COPY %1100
- %1102 = COPY %1100
- %1103 = COPY %1100
- %1104 = COPY %1100
- %1105 = COPY %1100
- %1106 = COPY %1100
- %1107 = COPY %1100
- %1108 = COPY %1100
- %1109 = COPY %1100
- %1110 = COPY %1100
- %1111 = COPY %1100
- %1112 = COPY %1100
- %1113 = COPY %1100
- %1114 = COPY %1100
- %1115 = COPY %1100
- %1116 = COPY %1100
- %1117 = COPY %1100
- %1118 = COPY %1100
- %1119 = COPY %1100
- %1120 = COPY %1100
- %1121 = COPY %1100
- %1122 = COPY %1100
- %1123 = COPY %1100
- %1124 = COPY %1100
- %1125 = COPY %1100
+ %1:sgpr_128 = COPY $sgpr100_sgpr101_sgpr102_sgpr103
+ %2:sgpr_128 = COPY %1
+ %3:sgpr_128 = COPY %1
+ %4:sgpr_128 = COPY %1
+ %5:sgpr_128 = COPY %1
+ %6:sgpr_128 = COPY %1
+ %7:sgpr_128 = COPY %1
+ %8:sgpr_128 = COPY %1
+ %9:sgpr_128 = COPY %1
+ %10:sgpr_128 = COPY %1
+ %11:sgpr_128 = COPY %1
+ %12:sgpr_128 = COPY %1
+ %13:sgpr_128 = COPY %1
+ %14:sgpr_128 = COPY %1
+ %15:sgpr_128 = COPY %1
+ %16:sgpr_128 = COPY %1
+ %17:sgpr_128 = COPY %1
+ %18:sgpr_128 = COPY %1
+ %19:sgpr_128 = COPY %1
+ %20:sgpr_128 = COPY %1
+ %21:sgpr_128 = COPY %1
+ %22:sgpr_128 = COPY %1
+ %23:sgpr_128 = COPY %1
+ %24:sgpr_128 = COPY %1
+ %25:sgpr_128 = COPY %1
+ %26:sgpr_128 = COPY %1
S_BRANCH %bb.1
bb.1:
liveins: $sgpr96_sgpr97, $sgpr98_sgpr99, $sgpr102_sgpr103
- %0 = S_OR_SAVEEXEC_B64 $sgpr96_sgpr97, implicit-def $exec, implicit-def $scc, implicit $exec
+
+ %0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr96_sgpr97, implicit-def $exec, implicit-def $scc, implicit $exec
$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
- SI_MASK_BRANCH %bb.100, implicit $exec
+ SI_MASK_BRANCH %bb.3, implicit $exec
S_BRANCH %bb.2
bb.2:
liveins: $sgpr98_sgpr99, $sgpr102_sgpr103
+
%0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr98_sgpr99, implicit-def $exec, implicit-def $scc, implicit $exec
$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
- SI_MASK_BRANCH %bb.100, implicit $exec
- S_BRANCH %bb.200
+ SI_MASK_BRANCH %bb.3, implicit $exec
+ S_BRANCH %bb.4
- bb.100:
+ bb.3:
liveins: $sgpr102_sgpr103
+
%0:sreg_64 = S_OR_SAVEEXEC_B64 $sgpr102_sgpr103, implicit-def $exec, implicit-def $scc, implicit $exec
$exec = S_XOR_B64_term $exec, %0, implicit-def $scc
- S_BRANCH %bb.200
-
- bb.200:
- S_CMP_EQ_U64 %1100.sub0_sub1, %1101.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1102.sub0_sub1, %1103.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1104.sub0_sub1, %1105.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1106.sub0_sub1, %1107.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1108.sub0_sub1, %1109.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1110.sub0_sub1, %1111.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1112.sub0_sub1, %1113.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1114.sub0_sub1, %1115.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1116.sub0_sub1, %1117.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1118.sub0_sub1, %1119.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1120.sub0_sub1, %1121.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1122.sub0_sub1, %1123.sub2_sub3, implicit-def $scc
- S_CMP_EQ_U64 %1124.sub0_sub1, %1125.sub2_sub3, implicit-def $scc
+ S_BRANCH %bb.4
+ bb.4:
+ S_CMP_EQ_U64 %1.sub0_sub1, %2.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %3.sub0_sub1, %4.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %5.sub0_sub1, %6.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %7.sub0_sub1, %8.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %9.sub0_sub1, %10.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %11.sub0_sub1, %12.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %13.sub0_sub1, %14.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %15.sub0_sub1, %16.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %17.sub0_sub1, %18.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %19.sub0_sub1, %20.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %21.sub0_sub1, %22.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %23.sub0_sub1, %24.sub2_sub3, implicit-def $scc
+ S_CMP_EQ_U64 %25.sub0_sub1, %26.sub2_sub3, implicit-def $scc
$vgpr0 = V_MOV_B32_e32 0, implicit $exec
S_SETPC_B64_return undef $sgpr30_sgpr31, implicit %0, implicit $vgpr0
-
...
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