[PATCH] D89170: [AMDGPU] Use flat scratch instructions where available

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D89170#2345943 <https://reviews.llvm.org/D89170#2345943>, @rampitec wrote:

> I also came to conclusion that the only robust way to have no failed scavenging during frame lowering is to always have an sp or fp. Otherwise it can fail regardless of the spilling method. The only other way is to have an instruction with full 32 bit immediate offset. I.e. it can fail in a kernel with MUBUF as well.

I was considering requiring an FP if the stack size was starting to hit the offset limit, but was unable to come up with a testcase where it would really break


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