[PATCH] D87107: [AMDGPU] Target hook to apply target specific split constraint

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/RegAllocGreedy.cpp:1262-1263
     Intf.moveToBlock(Number);
-
+    if (!TII->IsValidForLISplit(MF->getBlockNumbered(Number)))
+      return false;
     if (!Intf.hasInterference()) {
----------------
Why is this early exiting here and not in the same place as lower in the loop, after the hasInterference check?

```
    // Abort if the spill cannot be inpserted at the MBB' start
    if (!MBB->empty() &&
        SlotIndex::isEarlierInstr(LIS->getInstructionIndex(MBB->instr_front()),
                                  SA->getFirstSplitPoint(Number)))
      return false;
    // Interference for the

```


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:6812
+                (Instr->getOpcode() == AMDGPU::S_OR_B64) ||
+            (Instr->getOpcode() == AMDGPU::S_MOV_B64 &&
+             Instr->getOperand(0).getReg() == AMDGPU::EXEC));
----------------
Doesn't handle wave32


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:6820
+        if (I->getOpcode() == AMDGPU::S_CBRANCH_EXECNZ) {
+          if ((++I)->getOpcode() == AMDGPU::S_BRANCH &&
+              I->getOperand(0).getMBB() == MBB) {
----------------
This doesn't consider fallthrough blocks


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87107/new/

https://reviews.llvm.org/D87107