[PATCH] D89872: [SVE][AArch64] Fix TypeSize warning in GEP cost analysis

[Joe Ellis via Phabricator via llvm-commits]

joechrisellis created this revision.
joechrisellis added reviewers: sdesmalen, peterwaller-arm, fpetrogalli.
Herald added subscribers: llvm-commits, psnobl, kristof.beyls, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.
joechrisellis requested review of this revision.

The warning would fire when calling getGEPCost for analyzing the cost of
a GEP instruction. This would result in the use of the now deprecated
implicit cast of TypeSize to uint64_t through the overloaded operator.

This patch fixes the issue by using getKnownMinSize instead of the
implicit cast. This is possible because the code is already
scalable-vector aware. The semantic behaviour of the code is unchanged
by this patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D89872

Files:
  llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
  llvm/test/Analysis/CostModel/AArch64/gep-cost-scalable-vector-typesize-warning.ll


Index: llvm/test/Analysis/CostModel/AArch64/gep-cost-scalable-vector-typesize-warning.ll
===================================================================
--- /dev/null
+++ llvm/test/Analysis/CostModel/AArch64/gep-cost-scalable-vector-typesize-warning.ll
@@ -0,0 +1,28 @@
+; RUN: opt -S -O2 -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; This regression test is verifying that a GEP instruction performed on a
+; scalable vector does not produce a 'assumption that TypeSize is not scalable'
+; warning when performing cost analysis.
+; Note that a loop is necessary here to ensure that cost analysis takes place.
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning: {{.*}}TypeSize is not scalable
+
+declare void @do_something(<vscale x 4 x i32>* %x);
+
+; CHECK-LABEL: @gep_scalable_vector
+; CHECK-NOT: vector.body
+define void @gep_scalable_vector(<vscale x 4 x i32>* %b) {
+entry:
+  br label %loop.body
+loop.body:
+  %0 = phi i64 [0, %entry], [%1, %loop.body]
+  %idx = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %b, i64 %0
+  call void @do_something(<vscale x 4 x i32>* %idx)
+  %1 = add i64 %0, 1
+  %2 = icmp eq i64 %1, 1000
+  br i1 %2, label %loop.end, label %loop.body
+loop.end:
+  ret void
+}
Index: llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
===================================================================
--- llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -809,7 +809,8 @@
         uint64_t Field = ConstIdx->getZExtValue();
         BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
       } else {
-        int64_t ElementSize = DL.getTypeAllocSize(GTI.getIndexedType());
+        uint64_t ElementSize =
+            DL.getTypeAllocSize(GTI.getIndexedType()).getKnownMinSize();
         if (ConstIdx) {
           BaseOffset +=
               ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;


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