[llvm] 1af51f0 - [TargetLowering] Add test for bit comparison fold

[Sven van Haastregt via llvm-commits]

Author: Sven van Haastregt
Date: 2020-10-21T11:46:45+01:00
New Revision: 1af51f077b003253ff50567022efd1e850b2ec54

URL: https://github.com/llvm/llvm-project/commit/1af51f077b003253ff50567022efd1e850b2ec54
DIFF: https://github.com/llvm/llvm-project/commit/1af51f077b003253ff50567022efd1e850b2ec54.diff

LOG: [TargetLowering] Add test for bit comparison fold

This adds a test covering an issue in bit comparison folding.  The
issue will be addressed in the subsequent commit.

Patch by Erik Hogeman.

Differential Revision: https://reviews.llvm.org/D89390

Added: 
    llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll b/llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
new file mode 100644
index 000000000000..13e35d940528
--- /dev/null
+++ b/llvm/test/CodeGen/NVPTX/pow2_mask_cmp.ll
@@ -0,0 +1,13 @@
+; RUN: llc -march=nvptx -verify-machineinstrs < %s | FileCheck %s
+
+; Tests the following pattern:
+; (X & 8) != 0 --> (X & 8) >> 3
+
+; CHECK-LABEL: @pow2_mask_cmp
+; CHECK: bfe.u32 {{%r[0-9]+}}, {{%r[0-9]+}}, 3, 1
+define i32 @pow2_mask_cmp(i32 %x) {
+  %a = and i32 %x, 8
+  %cmp = icmp ne i32 %a, 0
+  %r = zext i1 %cmp to i32
+  ret i32 %r
+}