[PATCH] D89449: [RISCV] Initial infrastructure for code generation of the RISC-V V-extension

[PeiHsiangHung via Phabricator via llvm-commits]

NickHung added a comment.





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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:94
+  // V registers for code generation. We handle them manually.
+  markSuperRegs(Reserved, RISCV::VL);
+  markSuperRegs(Reserved, RISCV::VTYPE);
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The reserved VL and VTYPE would immediately dead after implicit def. How do you support the calling convention?  Both CSRs are caller-saved.


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https://reviews.llvm.org/D89449