[PATCH] D89576: [SVE][CodeGen] Lower scalable masked scatters

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D89576#2342062 <https://reviews.llvm.org/D89576#2342062>, @kmclaughlin wrote:

> In D89576#2336179 <https://reviews.llvm.org/D89576#2336179>, @craig.topper wrote:
>
>> X86 does have its own sext combine. Does anything prevent refineIndexType from making index types that aren't supported by the hardware instruction?
>
> Hi @craig.topper, there is nothing to prevent refineIndexType from returning an index type that isn't supported, though if the type of Index is illegal then I think it should be sign/zero extended again later during type legalisation.
> Do you think it's worth adding an interface to ask whether the instruction can perform the sign/zero-extend first before removing it in refineIndexType?

I was thinking of vXi8 and vXi16 vectors that can't be used as indices on X86.


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