[PATCH] D89788: [RISCV] Add GHC calling convention
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 20 10:06:55 PDT 2020
jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1964-2003
+static bool CC_RISCV_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
+ CCValAssign::LocInfo LocInfo,
+ ISD::ArgFlagsTy ArgFlags, CCState &State) {
+
+ if (LocVT == MVT::i64) {
+ // Pass in STG registers: Base, Sp, Hp, R1, R2, R3, R4, R5, R6, R7, SpLim
+ static const MCPhysReg GPRList[] = {
----------------
lenary wrote:
> Is this doable with the declarative Calling Convention system in LLVM (an example of this is in `llvm/lib/Target/ARM/ARMCallingConv.td`)
>
> We haven't been able to do this for RISC-V's normal calling convention yet, but this convention seems a lot simpler, so I hope it should be doable.
We deliberately went with C++ rather than TableGen for Fast, as it's far more readable (and flexible).
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D89788/new/
https://reviews.llvm.org/D89788
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