[PATCH] D89738: [AMDGPU] Refactor SOPC & SOPP .td for extension
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 19 14:14:18 PDT 2020
rampitec added a comment.
Are there hazards associated with SOP, where we have it lowered to real instructions?
Also please run PSDB for this change.
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Comment at: llvm/lib/Target/AMDGPU/SOPInstructions.td:954
+ // copy relevant pseudo op flags
+ let SubtargetPredicate = ps.SubtargetPredicate;
+ let AsmMatchConverter = ps.AsmMatchConverter;
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Can you copy OtherPredicates too? We always missing it.
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Comment at: llvm/lib/Target/AMDGPU/SOPInstructions.td:974
}
-class SOPC_Helper <bits<7> op, RegisterOperand rc, ValueType vt,
+class SOPC_Helper <RegisterOperand rc, ValueType vt,
string opName, SDPatternOperator cond> : SOPC_Base <
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Please add a blank line.
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Comment at: llvm/lib/Target/AMDGPU/SOPInstructions.td:1079
+ // copy relevant pseudo op flags
+ let SubtargetPredicate = ps.SubtargetPredicate;
+ let AsmMatchConverter = ps.AsmMatchConverter;
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Also copy OtherPredicates.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D89738/new/
https://reviews.llvm.org/D89738
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