[PATCH] D89217: [AMDGPU] Base getSubRegFromChannel on TableGen data

[Sebastian Neubauer via Phabricator via llvm-commits]

Flakebi added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:102
+      assert((Width - 1) < SubRegFromChannelTable.size());
+      assert(Offset < SubRegFromChannelTable[Width].size());
+      SubRegFromChannelTable[Width - 1][Offset] = Idx;
----------------
This index should also be `Width - 1`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89217/new/

https://reviews.llvm.org/D89217